Logic circuit using CMOS transistors

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307214, 307215, 307218, 307251, 307270, H03K 1908, H03K 1940, H03K 1920, H03K 1704

Patent

active

041223608

ABSTRACT:
A logic circuit using CMOS transistors, in which electrical power is supplied to a CMOS logic circuit that is formed of P-channel type and N-channel type MOS transistors by way of a depletion type MOS transistor. The output level with respect to the voltage of the power source that is used is set at some point by the design of the depletion-type MOS transistor.

REFERENCES:
patent: 3737673 (1973-06-01), Suzuki
patent: 3855549 (1974-12-01), Heuner et al.
patent: 3956880 (1976-05-01), O'Connor
Lohman, "Applications of MOS FET's in Microelectronics"; SCP and Solid-State Technology (pub.) pp. 23-29, Mar. 1966.

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