Logic circuit simulation method

Details Logic circuit simulation method Logic circuit simulation method

1987-12-04

1990-05-01

Gruber, Felix D.

Boots, shoes, and leggings

371 23, G01R 3128, G06F 1100

Patent

active

049224450

ABSTRACT:
A logic circuit simulation method for simulating a logic circuit including a plurality of logic blocks, in which after having simulated the whole simulation object logic circuit, signal variation information of an arbitrary logic block is taken out from the simulation result, the information thus taken out is given to the logic blocks, and a renewed simulation is executed for every logic block.

REFERENCES:
patent: 3715573 (1973-02-01), Vogelsberg
patent: 4342093 (1982-07-01), Miyoshi
patent: 4534028 (1985-08-01), Trischler
patent: 4590581 (1986-05-01), Widdoes, Jr.
patent: 4644487 (1987-02-01), Smith
patent: 4696006 (1987-09-01), Kawai
patent: 4747102 (1988-05-01), Funatsu

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