Logic-circuit layout for large-scale integrated circuits

Details Logic-circuit layout for large-scale integrated circuits Logic-circuit layout for large-scale integrated circuits

1985-10-21

1988-03-15

Edlow, Martin H.

357 40, 357 45, H01L 2348

Patent

active

047316438

ABSTRACT:
A VLSI chip has multiple annular rings of circuit cells, interspersed with annular wiring channels for interconnecting the cells. Another wiring layer runs perpendicular to the rings. A central chip area contains all the I/O connections for the chip.

REFERENCES:
patent: 3714527 (1973-01-01), Schmidt
patent: 3751720 (1973-08-01), Nestork
patent: 3795845 (1974-03-01), Cass
patent: 4575744 (1986-03-01), Caldwell
IBM Technical Disclosure Bulletin, vol. 14#12, May 1972, p. 3636 by Tsui.

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