Logic circuit including at least one resistor or one transistor

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307446, 357 22, 357 55, H03K 19094

Patent

active

043945899

ABSTRACT:
A logic circuit including an input stage, wherein a first field-effect transistor is in series with a first saturable resistor interposed on the drain side in the supply of the first transistor, and an output stage including a second transistor which is identical with the first and has a supply on the drain side which is common with the input stage supply. The gate of the second transistor is connected to the drain of the first transistor. The supply circuit of the second transistor is closed across a forward-biased diode, and a second saturable resistor on the ground of the common supply is connected to the source of the first transistor. At least a selected of the field effect transistors or the saturable resistors has a saturable resistor structure formed of a layer of semiconductor material on a semi-insulating substrate. The material is doped to set up a dipolar domain in respect of an electric field which is higher than a so-called critical value. The saturable resistor structure further includes a groove cut in the semiconductor layer between two ohmic contacts so as to define a residual channel in the material. The dimensions of the groove are such that the critical value of the electric field is overstepped in respect of a value of the order of one volt of the voltage between the ohmic contacts.

REFERENCES:
patent: 3700981 (1972-10-01), Masuhara et al.
patent: 4028556 (1977-06-01), Cachier et al.
patent: 4300064 (1981-11-01), Eden

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