Logic circuit having testability for defective via contacts

Details Logic circuit having testability for defective via contacts Logic circuit having testability for defective via contacts

1987-02-02

1987-09-29

Karlsen, Ernest F.

Electricity: measuring and testing

Plural, automatically sequential tests

324158R, G01R 3128

Patent

active

046971394

ABSTRACT:
An integrated circuit having improved testability for defects includes a group of logic gates having respective input terminals and output terminals; a conductor that intercouples the output terminal of one logic gate in the group to respective input terminals on the remaining logic gates; a first via contact which, in the absence of a defect, couples the conductor through a first resistive device to a low voltage bus; a parasitic capacitor which couples the conductor to a high voltage bus; and a second via contact which, in the absence of a defect, couples the conductor through a second resistive device to the high voltage bus.

REFERENCES:
patent: 4499579 (1985-02-01), Still et al.

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