Logic circuit having error detection function and processor incl

Details Logic circuit having error detection function and processor incl Logic circuit having error detection function and processor incl

1997-12-12

1999-03-09

Canney, Vincent P.

Excavating

G06F 1106

Patent

active

058810781

ABSTRACT:
Soft errors generated at an active time are reduced by adding a small-scale circuit to a high performance LSI, such as a processor without reducing the performance of the circuit. The processor has individual logic circuits each having a plurality of stages of logic gates for outputting true signals and complement signals for the individual logic gates. A latch circuit latches the true and complement signals of the logic circuits separately and a compare circuit detects for an error by comparing the true and complement output signals of the logic circuits to determine if they are at the same logical signal level or not, just upstream of the latch in which the individual true and complement output signals of the final logic circuit stages are individually latched. When the compare circuit detects an error because the true and complement output signals are at the same logical signal level, a recovery process is executed.

REFERENCES:
S. Horiguchi et al, "An Automatically Designed 32b CMOS VLSI Processor", 1982 IEEE International Solid-States Circuits Conference--Digest of Technical Papers, Feb. 1982, pp. 54-55.
1996 IEEE International Solid-States Circuits Conference, Tutorial #4, "Dynamic Logic: Clocked and Asynchronous", Feb. 1996, pp. 1 and 21.

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