Logic circuit for bistable D-dynamic flip-flops

Details Logic circuit for bistable D-dynamic flip-flops Logic circuit for bistable D-dynamic flip-flops

1975-09-16

1977-11-08

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307221C, 307269, H03K 3286, H03K 3353

Patent

active

040577414

ABSTRACT:
A logic circuit for dynamic D-flip-flop includes five n-channel MOS transistors and five p-channel MOS transistors. When used as a shift register stage, it works correctly without any additional delay element or capacitor. With two more MOS-transistors, the logic circuit works correctly with any sequence of input signals.

REFERENCES:
patent: 3619644 (1971-11-01), Vittoz
patent: 3749937 (1973-07-01), Rogers
patent: 3866186 (1975-02-01), Suzuki
patent: 3887822 (1975-06-01), Suzuki
Suzuki et al., "Clocked CMOS Calculator Circuitry"; IEEE Journal of Solid-State Circuits," vol. SC-8, No. 6, pp. 462-469; 12/1973.

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