Logic circuit building block and systems constructed from same

Details Logic circuit building block and systems constructed from same Logic circuit building block and systems constructed from same

1981-02-18

1984-03-20

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307518, 377 67, 377119, H03K 1900

Patent

active

044383509

ABSTRACT:
A logic circuit building block, referred to as an M Circuit, is provided which solves various problems of prior art logic circuit building blocks and binary logic systems. The M Circuit responds to transitions of a two level binary input signal to provide a memory and a logic function which has a complete truth table for every possible combination of input signal transitions or changes in logic level at a pair of input terminals A and B. The M Circuit generally includes both logic gating and a memory for placing the M Circuit in a set condition in response to the application of first known combinations of input signal levels or transitions at the A and B terminals, and for placing the M Circuit in a reset condition in response to the application of second known combinations of input signal levels at the A and B input terminals. The M Circuit is placed in a memory condition whereby it memorizes its previous set or reset condition in response to the application of third known combinations of input signal levels at the A and B input terminals. A pair of output terminals Q and Q for the M Circuit provide a first known combination of complementary output signal levels when the M Circuit is in the set condition, and a second known combination of complementary output signal levels when the M Circuit is in the reset condition. Thus, the M Circuit provides predetermined complementary, binary output signals at the Q and Q terminals for every possible combination of input signal transitions at the A and B terminals in accordance with its truth table function.
The single M Circuit may have its terminals connected in a manner which provides various subsystem operating characteristics, such as those of an inverter or an oscillator. Systems formed with a plurality of M Circuits connected in linear and/or planar arrays are disclosed and include counters, shift registers, pulse generating and wave shaping devices, Boolean function generators, random function generators, data conversion and data separating systems, electronic lock systems, self-adaptive switcher systems, and learn machines.

REFERENCES:
patent: 3778794 (1973-12-01), Szabo et al.

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