Logic circuit arrangement in the integrated MOS-circuitry techni

Details Logic circuit arrangement in the integrated MOS-circuitry techni Logic circuit arrangement in the integrated MOS-circuitry techni

1979-11-16

1982-04-06

Malzahn, David H.

Boots, shoes, and leggings

3401462, G06F 750, G06F 738

Patent

active

043239820

ABSTRACT:
A multi-stage logic circuit employing integrated MOS-circuit techniques having gates to produce carry signals between stages where the gates which transfer the carry signals are designed as transfer-gates. Specific circuits are shown for full adders, comparators, synchronous binary counters, forwards-backwards synchronous binary counters and forwards-synchronous counting decades.

REFERENCES:
patent: 3767906 (1973-10-01), Pryor
patent: 3843876 (1974-10-01), Fette et al.
patent: 4012714 (1977-03-01), Lohmann
patent: 4037085 (1977-07-01), Minorikawa

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