Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2003-06-04
2008-12-09
Mai, Tan V (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
07464130
ABSTRACT:
A logic circuit having structure for performing the AES Rijndael MixColumns transform exploits the relationship between each successive row of the transform matrix and its preceding row. Multiplication of an (m.times.n) matrix by a (1.times.n) or by a (m.times.1) matrix is performed, where m is a number of rows and n is a number of columns, and where each successive row, m, of n elements is a predetermined row permutation of a preceding row, includes: n multiplication circuits; n logic circuits; n registers for receiving logical output from the logic circuits; feedback logic for routing contents of each register to a selected one of inputs of the logic circuits in accordance with a feedback plan that corresponds to the relationship between successive matrix rows; and a control unit for successively providing as input to each of the n multiplication circuits each element in the (1.times.n) or (m.times.1) matrix.
REFERENCES:
patent: 5933361 (1999-08-01), Ohki
patent: 6718465 (2004-04-01), Lin
patent: 2004/0010533 (2004-01-01), Castrapel et al.
McLoone Met al, “High performance slngle-chlp FPGA RIJnadael algorithm implementations” Cryptographic Hardware and Embedded Systems. 3rd International Workshop, CHES 2001, Paris, Francce, May 14-16, 2001 Proceedings, Lecture Notes in Computer Science, Berlin: Springer, DE, vol. 2162, May 14, 2001, pp. 65-76.
Stallings, “The Advanced Encryption Standard”, Cryptologia, United States Military Academy, West Point, NY, US, vol. 26, No. 3, Jul. 2001, pp. 165-188.
Mai Tan V
NXP B.V.
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