Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override
Reexamination Certificate
2000-04-17
2001-04-03
Zweizig, Jeffrey (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Signal transmission integrity or spurious noise override
Reexamination Certificate
active
06211720
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates, as is indicated, to a logic circuit. More particularly, the present invention relates to a logic circuit for high speed operation at low power supply voltage.
2. Description of the Related Art
As described in, for example, Japanese Laid-open Patent Publication No. 5-14166, increasing speed of operation has been tried in recent years by supplying a voltage higher than the power supply voltage between a gate and a source of a transistor using a capacitor.
FIG. 31
is a diagram of a logic circuit of the prior art. Reference labels
3101
,
3120
and
3110
designate a logic input terminal, an output terminal and a power supply for supplying a voltage of Vdd, respectively. Reference labels
3108
and
3109
designate a P-channel FET (field effect transistor) and an N-channel FET, respectively. Reference labels
3106
and
3107
designate bias power supplies for supplying a voltage of Vs. Reference labels
3102
and
3103
designate capacitors. Reference labels
3104
and
3105
designate an N-channel FET and a P-channel FET, respectively.
However, the logic circuit shown in
FIG. 31
suffers from the following inherent limitations. That is to say, a leak current flows when the FETs
3108
and
3109
are in an OFF state. Furthermore, it is not possible in the prior art to sufficiently drive (i.e., overdrive) the FETs
3108
and
3109
, or to sufficiently cut off the FETs
3108
and
3109
by biasing its gate with deep backward bias voltage. Therefore, the logic circuit according to the prior art results in a high dissipation power and cannot perform a high-speed operation at a low voltage.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, a logic circuit includes: a main switching means for changing the conduction state between at least two terminals in accordance with a voltage supplied to a control terminal; and a voltage converting means for converting a voltage at an input terminal and outputting the converted voltage to the control terminal.
In one embodiment of the invention, the voltage converting means includes a voltage generating means and a sub switching means.
In another embodiment of the invention, the sub switching means includes an SOI (semiconductor-on-insulator) structure.
In still another embodiment of the invention, the voltage generating means includes at least one of a capacitor, a battery and a high dielectric material.
In still another embodiment of the invention, the voltage converting means supplies a higher voltage than that of the input terminal to the control terminal in a first state, the first state being a state of the input terminal where the main switching means is conductive.
In still another embodiment of the invention, the voltage converting means supplies a lower voltage than that of the input terminal to the control terminal in a second state, the second state being a state of the input terminal where the main switching means is non-conductive.
In still another embodiment of the invention, the voltage converting means supplies a higher voltage than that of the input terminal to the control terminal in a first state; and the voltage converting means supplies a lower voltage than that of the input terminal to the control terminal in a second state; the first state being a state of the input terminal where the main switching means is conductive; and the second state being a state of the input terminal where the main switching means is non-conductive.
In still another embodiment of the invention, the voltage converting means further includes a capacitor of which a first terminal is connected to the input terminal; and wherein the sub switching means connects a second terminal of the capacitor to the control terminal of the main switching means in the first state; and connects the second terminal of the capacitor to the voltage generating means, and connects the control terminal of the main switching means to the ground in a state other than the first state.
In still another embodiment of the invention, the voltage converting means further includes a capacitor of which a first terminal is connected to the input terminal; and wherein the sub switching means connects a second terminal of the capacitor to the control terminal of the main switching means in the second state; and connects the first terminal of the capacitor to the control terminal of the main switching means, and connects the second terminal of the capacitor to the ground in a state other than the second state.
In still another embodiment of the invention, the voltage converting means further includes a first capacitor of which a first terminal is connected to the input terminal and a second capacitor of which a first terminal is connected to the input terminal; and wherein the sub switching means connects a second terminal of the first capacitor to the ground and connects a second terminal of the second capacitor to the control terminal of the main switching means in the first state; and connects the second terminal of the first capacitor to the control terminal of the main switching means and connects the second terminal of the second capacitor to the voltage generating means in the second state.
In still another embodiment of the invention, the main switching means includes an N-channel MOS FET.
In still another embodiment of the invention, the main switching means includes a P-channel MOS FET.
In still another embodiment of the invention, the main switching means includes a complementary MOS FETs.
According to another aspect of the invention, a logic circuit includes: a first and a second main switching means for changing conduction state between at least two terminals in accordance with a voltage supplied to a control terminal; a first voltage converting means for converting a voltage at an input terminal and outputting the converted voltage to the control terminal of the first main switching means; and a second voltage converting means for converting a voltage at an input terminal and outputting the converted voltage to the control terminal of the second main switching means, wherein the first voltage converting means includes a first capacitor having a first terminal and a second terminal, a second capacitor having a first terminal and a second terminal, a first sub switching means, and a first voltage generating means; the first terminal of the first capacitor and the first terminal of the second capacitor being connected to the input terminal; the second voltage converting means includes a third capacitor having a first terminal and a second terminal, a fourth capacitor having a first terminal and a second terminal, a second sub switching means, and a second voltage generating means; the first terminal of the third capacitor and the first terminal of the fourth capacitor being connected to the input terminal through an inverter; the first sub switching means connects a second terminal of the first capacitor to the ground and connects a second terminal of the second capacitor to the control terminal of the first main switching means in the first state; and connects the second terminal of the first capacitor to the control terminal of the first main switching means and connects the second terminal of the second capacitor to the first voltage generating means in the second state; and the second sub switching means connects the second terminal of the first capacitor to the ground and connects the second terminal of the second capacitor to the control terminal of the first main switching means in the second state; and connects the second terminal of the first capacitor to the control terminal of the second main switching means and connects the second terminal of the second capacitor to the second voltage generating means in the first state.
Thus, the invention described herein makes possible the advantage of providing a logic circuit which enables a high-speed operation at a low power supply voltage, and in which a leak current (i.e., a dissipation power) is small
Matsushita Electric - Industrial Co., Ltd.
Renner Otto Boisselle & Sklar
Zweizig Jeffrey
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