Logic cell placement method for semiconductor integrated circuit

Details Logic cell placement method for semiconductor integrated circuit Logic cell placement method for semiconductor integrated circuit

1991-02-20

1993-06-22

Trans, Vincent N.

Boots, shoes, and leggings

364490, 364489, 364488, G06F 1560

Patent

active

052220311

ABSTRACT:
A logic cell placement method for a semiconductor circuit includes a cluster pair generating and calculating step for forming a cluster pair made up of any two clusters when there are more than three clusters, each of which comprises at least one logic cell. The calculating method includes estimate values of each cluster pair by using estimate functions based on a congestion rate of the number of wirings on the cluster pair. The method also includes an upper limit setting step for calculating cost values by using the estimate values for each cluster pair, mean values of the cost values and the estimate values for the whole cluster pairs, then setting the upper limit of for each estimate value obtained by using the mean values of the estimate values. A selecting step selects the cluster pair having the smallest cost value. A calculating step calculates estimate values of the cluster pair having the smallest cost value by using the estimate functions based on the congestion rate of the number of wirings, a clustering step for clustering the pair into one cluster when all of the estimate values of the cluster pair having the smallest cost value are less than the upper limits thereof. The current process is returned into the selecting step when there are two clusters which are not handled by the clustering step. The current process is returned into the cluster pair generating and calculating step when a terminate condition for the logic cell placement method is not satisfied.

REFERENCES:
patent: 3654615 (1972-04-01), Freitag
patent: 4615011 (1986-09-01), Linsker
patent: 4630219 (1986-12-01), DiGiacomo et al.
patent: 4636966 (1987-01-01), Yamada et al.
patent: 4688072 (1987-08-01), Heath et al.

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