Logic analyzer with double triggering action

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G06F 700

Patent

active

050311280

ABSTRACT:
A logic analyzer for plural input channels generates trigger signals for first and second triggering modes selected by a multiplexer. In the first mode, a channel selector produces a detection signal in the form of a pulse when the plural input channels simultaneously have logic states matching a reference combination input to the channel selector. In the second mode, the channel selector produces a detection signal in the form of a pulse corresponding to the logic state of a channel selected by a channel selection signal input to the channel selector. The first mode triggering signal exhibits a digital transition when the pulse endures at least as long as a target time period determined by a target count times the interval between clock pulses while the second mode trigger signal exhibits a digital transition when the pulse terminates before enduring for the target time period.

REFERENCES:
patent: 3760355 (1973-09-01), Bruckert
patent: 4375635 (1983-03-01), Leow et al.
patent: 4404542 (1983-09-01), Thomas, Jr.
patent: 4725812 (1988-02-01), Kloppe
patent: 4774438 (1988-09-01), Rogers et al.
patent: 4829462 (1989-05-01), Freeman et al.
patent: 4847877 (1989-07-01), Besseyre
B. Comby, "L'Interet d'Une Acquisition en Temporel Transitionnel en Analyse Logique Rapide", Electronique Industrielle, No. 112, Sep. 15, 1986, Paris, pp. 55-63.
P. Dittman, "Logic Analyzers Simplify System Integration Tasks", Computer Design, Mar. 1981, pp. 55-63.

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