1985-05-24
1987-10-20
Smith, Jerry
Excavating
371 27, 324 73R, G01R 3128, G06F 1100
Patent
active
047019182
ABSTRACT:
A logic analyzer applies test pattern signals from a pattern generator to a circuit under test and sequentially reads logic outputs into a memory. The output from the circuit under test when it reaches a predetermined logic state is input as an external control signal into the logic analyzer. A change command is generated from the pattern generator in relation to the generation of the test pattern signal. When the change command and the external control signal are obtained at the same time, and flow of the generation of the test pattern signals is changed to a predetermined flow.
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M. Gatrell, "Automatically Generating Efficient Testing Sequences . . . ", IBM Tech. Bull., V19, No. 4, 9/1976, pp. 1448-1449.
Akiyama Noboru
Aoki Tetsuo
Kobayashi Katsumi
Nakajima Takayuki
Beausoliel, Jr. Robert W.
Smith Jerry
Takeda Riken Kogyo Kabushikikaisha
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