Logarithmic amplifying circuit using quadritail cells

Miscellaneous active electrical nonlinear devices – circuits – and – Specific input to output function – Logarithmic

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327352, G06F 7556, G06G 724

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active

054711665

ABSTRACT:
A logarithmic amplifying circuit with a wide input dynamic range using cascade-connected differential amplifiers, a rectifier connected to each of the amplifiers and an adder for adding the output currents of the rectifiers. The rectifiers each have a quadritail cell which consists of a single tall current source and four transistors. The transistors are emitter-connected or source-connected and driven by the tail current source. The bases or gates of the first and second transistors of the quadritail cell are connected to respective terminals of a differential input pair of the rectifier. The collectors or drains of the first and second transistors are connected in common to one terminal of a differential output pair of the rectifier, and the collectors or drains of the third and fourth transistors are connected in common to the other output terminal of the rectifier. Further, the bases or gates of the third and fourth transistors are connected in common and receive a neutral voltage corresponding to the differential input.

REFERENCES:
patent: 4090150 (1978-05-01), Vachenauer
patent: 4794342 (1988-12-01), Kimura
patent: 5057717 (1991-10-01), Kimura
patent: 5319264 (1994-06-01), Kimura
patent: 5345185 (1994-09-01), Gilbert
K. Kimura, "Some Circuit Design Techniques . . . Rectifiers Operable on Low Supply Voltage", IEEE Trans. on Cir. and Sys.-I: Fund. Theory and Applns, vol. 39, No. 9, Sept. 1992, pp. 771-777.

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