Log encoder/decorder system

Coded data generation or conversion – Digital code to digital code converters – Adaptive coding

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364748, 364857, 341 63, 341 75, H03M 700

Patent

active

047914033

ABSTRACT:
A high speed form of finite precision binary arithmetic coding comprises encoding/decoding performed in the logarithm domain, resulting in facilitated computation based on additions and subtractions rather than multiplications and divisions. In encoding and decoding, antilogs are used which are retrieved from an antilog table. The antilog table is characterized by the following constraints to assure decodability wherein for any two mantissas .alpha. and .beta. representing respective inputs to the antilog table:

REFERENCES:
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patent: 4286256 (1981-08-01), Langdon, Jr. et al.
patent: 4467317 (1984-08-01), Langdon, Jr. et al.
patent: 4633490 (1986-12-01), Goertzel et al.
G. G. Langdon, Jr., "An Introduction to Arithmetic Coding", IBM J. Research Develop., vol. 28, No. 2, pp. 135-149, Mar. 1984.
G. G. Langdon, Jr. et al, "Arithmetic Coding", IBM J. Res. Develop., vol. 23, NO. 2, pp. 149-162, Mar. 1979.
G. G. Langdon, Jr. et al, "Compression of Black-White Images with Arithmetic Coding", IEEE Trans. Commun., Com-29, 858-867, Jun. 1981.

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