LOCOS technology with reduced junction leakage

Details LOCOS technology with reduced junction leakage LOCOS technology with reduced junction leakage

1994-07-18

1996-06-25

Dang, Trung

Fishing, trapping, and vermin destroying

437 69, 437 28, H01L 2176

Patent

active

055299482

ABSTRACT:
A new method of local oxidation using an additional source/drain implantation to protect the area from crystalline defects and thereby reduce junction leakage is achieved. A pad silicon oxide layer is provided over the surface of a silicon substrate. A silicon nitride layer followed by a silicon dioxide layer is deposited overlying the pad silicon oxide layer. Portions of the silicon dioxide, silicon nitride, and pad silicon oxide layers not covered by a mask are etched away to provide an opening to the silicon substrate where the field oxidation region is to be formed. Silicon nitride spacers are formed on the sidewalls of the opening. Channel-stop ions are selectively implanted through the opening into the substrate underneath the opening. The silicon substrate is oxidized within the opening to form the field oxidation region. Stress-generated crystalline defects are formed underlying the field oxidation region at the edges of the opening. The silicon nitride spacers are removed. An additional source/drain ion implantation is performed by implanting ions with energy high enough so that the ions form implanted regions deep enough into the silicon substrate so that the crystalline defects are enclosed within the implanted regions and wherein the enclosure of the crystalline defects within the implanted regions reduces junction leakage. The silicon dioxide, silicon nitride, and pad silicon oxide layers are removed completing the field oxidation of the integrated circuit.

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VLSI Technology, by S. M. Sze, International Edition, McGraw-Hill Book Co., N.Y. N.Y.C. 1988, pp. 473-474.

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