Locos processes

Details Locos processes Locos processes

1999-08-30

2001-04-03

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

C438S400000

Reexamination Certificate

active

06211037

ABSTRACT:

TECHNICAL FIELD
The invention pertains to LOCOS processes, and in particular aspects pertains to methods of reducing stress during formation of field oxide by LOCOS.
BACKGROUND OF THE INVENTION
Local oxidation of silicon (LOCOS) is a method of forming field oxide regions for integrated circuitry on semiconductive material wafers. The field oxide regions can be utilized to electrically separate adjacent electrical devices. A LOCOS process is described with reference to
FIGS. 1-4
.
Referring to
FIG. 1
, a semiconductive material wafer fragment
10
is illustrated at a preliminary step of the LOCOS process. Wafer fragment
10
comprises a semiconductive material wafer substrate
12
, having a pad oxide layer
14
and a silicon nitride layer
16
formed thereover. Pad oxide layer
14
can comprise, for example, silicon dioxide. Pad oxide layer
14
is typically formed to a thickness of from about 20 nanometers to about 60 nanometers, and silicon nitride layer
16
is typically formed to a thickness of from about 100 nanometers to about 200 nanometers. Substrate
12
can comprise, for example, lightly doped monocrystalline silicon. To aid in interpretation of the claims that follow, the term “semiconductive substrate” or “semiconductor substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
A patterned masking layer
18
is provided over silicon nitride layer
16
. Patterned masking layer
18
can comprise, for example, photoresist patterned by a photolithographic process. Patterned masking layer
18
covers some portions (labeled as
20
) of silicon nitride layer
16
, and leaves other portions (labeled as
22
) uncovered.
Referring to
FIG. 2
, wafer fragment
10
is subjected to etching conditions which remove uncovered portions
22
of silicon nitride material
16
to form openings
26
. The etching also extends through pad oxide layer
14
to expose portions
31
of a surface of silicon layer
12
. The etching can either stop at an upper surface of substrate
12
(as shown), or in other processing (not shown) can extend partially into substrate
12
. The etching of openings
26
forms covered portions
20
of pad oxide
14
and silicon nitride
16
into masking blocks
30
.
Referring to
FIG. 3
, masking layer
18
(
FIG. 2
) is removed and wafer fragment
10
is subjected to oxidizing conditions which oxidize the semiconductive material of substrate
12
to grow silicon dioxide between masking blocks
30
and thereby form field oxide regions
50
. The oxidizing conditions can comprise, for example, wet oxidation conducted at temperatures of about 1,000° C. for a time of from about two hours to about four hours.
Referring to
FIG. 4
, nitride layer
16
(
FIG. 3
) is removed to leave field oxide regions
50
over substrate
12
. Field oxide regions
50
are joined by pad oxide
14
extending therebetween. In subsequent processing (not shown), pad oxide
14
can be stripped and replaced with another oxide layer. In further subsequent processing, semiconductor devices, such as, for example, transistors, can be formed between field oxide regions
50
. Such devices will then be electrically isolated between regions by field oxide regions
50
.
A difficulty which can occur during the above-discussed LOCOS processing is that the nitride material
16
of masking blocks
30
can cause tensile stress relative to underlying silicon-containing layers, which can result in deformation and dislocation of field oxide regions
50
. The problems associated with nitride-induced tensile stress increase as the spacing between masking blocks
30
is decreased. A continuing goal in semiconductor processing is to reduce spacings between adjacent devices. Accordingly, it would be desirable to alleviate the nitride-induced tensile stress associated with LOCOS processing.
SUMMARY OF THE INVENTION
In one aspect, the invention includes a method of reducing stress during formation of field oxide by LOCOS. Field oxide is formed by oxidizing a silicon-comprising substrate, and fluorine is incorporated into the field oxide during the oxidizing.
In another aspect, the invention includes a method of forming field oxide by LOCOS. A patterned silicon nitride layer is provided over a monocrystalline silicon substrate. The patterned silicon nitride layer covers some portions of the silicon-comprising substrate while leaving other portions uncovered. The uncovered portions of the substrate are exposed to an atmosphere comprising oxygen and fluorine to form field oxide regions having fluorine incorporated therein.
In yet another aspect, the invention includes a LOCOS process. A pad oxide is provided over a silicon-comprising substrate. A silicon nitride layer is provided over the pad oxide layer. The silicon nitride layer and pad oxide layer are patterned to form masking blocks, and to expose portions of the silicon-comprising substrate between the masking blocks. The exposed portions of the silicon-comprising substrate are defined as field oxide locations. The silicon-comprising substrate is oxidized in the field oxide locations to form field oxide regions. The silicon-comprising substrate is exposed to fluorine as it is oxidized to incorporate fluorine within the field oxide regions. After incorporating the fluorine, the field oxide regions are annealed at a temperature of at least about 1,000° C.


REFERENCES:
patent: 4752591 (1988-06-01), Beitman
patent: 5882984 (1999-03-01), Fan et al.
patent: 5902128 (1999-05-01), Mathews et al.

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