LOCOS fabrication processes and semiconductive material...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S510000

Reexamination Certificate

active

06326672

ABSTRACT:

TECHNICAL FIELD
The invention pertains to LOCOS methods of forming field oxide regions, and to semiconductive material structures.
BACKGROUND OF THE INVENTION
Local oxidation of silicon (LOCOS) is a method of forming field oxide regions on semiconductive material wafers. The field oxide regions can be utilized to electrically separate adjacent electrical devices which are formed over the semiconductive material wafer subsequent to the formation of the field oxide regions. A LOCOS process is described with reference to
FIGS. 1-5
.
Referring to
FIG. 1
, a semiconductive material wafer fragment
10
is illustrated at a preliminary step of a prior art LOCOS process. Wafer fragment
10
comprises a semiconductive material substrate
12
having a pad oxide layer
14
and a silicon nitride layer
16
formed thereover. Pad oxide layer
14
can comprise, for example, silicon dioxide, and is typically from about 20 nanometers to about 60 nanometers thick. Silicon nitride layer
16
is typically from about 100 nanometers to about 200 nanometers thick. Substrate
12
can comprise, for example, lightly doped monocrystalline silicon. To aid in interpretation of the claims that follow, the term “semiconductive substrate” or “semiconductor substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
A patterned masking layer
18
is provided over silicon nitride layer
16
. Patterned masking layer
18
can comprise, for example, photoresist patterned by a photolithographic process. Patterned masking layer
18
covers some portions (labeled as
20
) of silicon nitride layer
16
, and leaves other portions (labeled as
22
) uncovered.
Referring to
FIG. 2
, wafer fragment
10
is subjected to etching conditions which remove uncovered portions
22
(
FIG. 1
) of silicon nitride material
16
to form openings
26
. The etching also extends through pad oxide layer
14
and partially into silicon layer
12
. Openings
26
can extend to, for example, about 500 Å into substrate
12
.
The etching of openings
26
forms covered portions
20
of pad oxide
14
and silicon nitride
16
into masking blocks
30
. Such masking blocks have opposing sidewall edges
32
and
34
(which are labeled only for the center masking block shown in FIG.
2
). Also, the etching of openings
26
into substrate
12
forms pedestals
36
of the substrate material. Pedestals
36
have opposing sidewall surfaces coextensive with sidewall surfaces
32
and
34
of masking blocks
30
.
Referring to
FIG. 3
, masking layer
18
(
FIG. 2
) is removed and silicon nitride projections
40
,
42
,
44
and
46
are formed along the sidewall edges of masking blocks
30
and pillars
36
. Silicon nitride projections
40
,
42
,
44
and
46
can be formed to a thickness “T” of, for example, from about 100 Å to about 200 Å, and can be formed by depositing and anisotropically etching a layer of silicon nitride.
Referring to
FIG. 4
, wafer fragment
10
is subjected to oxidizing conditions to form field oxide regions
50
. The oxidizing conditions can comprise, for example, wet oxidation conducted at temperatures of about 1,000° C. for a time of from about 2 hours to about 4 hours. The oxidation grows silicon dioxide from portions of substrate
12
between masking blocks
30
. The growing silicon dioxide extends to under nitride projections
40
,
42
,
44
and
46
to from slight birds beak projections extending under silicon nitride layer
16
of masking blocks
30
. Projections
40
,
42
,
44
and
46
limit an extent to which the oxide grows to under nitride layer
16
of masking blocks
30
, and accordingly limits an amount of bird's beak formation.
Referring to
FIG. 5
, nitride layers
16
,
40
,
42
,
44
and
46
are removed to leave field oxide
50
over substrate
12
. Field oxide
50
has dips
52
formed therein where nitride projections
40
,
42
,
44
and
46
(
FIG. 4
) had been. Active area regions
31
are defined as regions between field oxide regions
50
.
Pad oxide
14
remains over active area regions
31
. In subsequent processing (not shown), pad oxide
14
can be stripped and replaced with another oxide layer. Subsequently, semiconductor devices, such as, for example, transistors can be formed between field oxide regions
50
. Such devices will then be electrically separated from one another by field oxide regions
50
.
Several difficulties occur in the processing described above with reference to
FIGS. 1-5
. Specifically, if nitride projections
40
,
42
,
44
and
46
are too thin, there will be excessive bird's beak encroachment under nitride layer
16
. On the other hand, if nitride projections
40
,
42
,
44
and
46
are too thick, dips
52
will be excessively large, and will lead to sub-threshold kinks and other problems with circuitry ultimately formed over active area regions
31
. It would therefore be desirable to develop alternative methods of LOCOS processing.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a LOCOS process. A pad oxide layer is provided over a silicon-comprising substrate. A silicon nitride layer is provided over the pad oxide layer and patterned with the pad oxide layer to form masking blocks. The patterning exposes portions of the silicon-comprising substrate between the masking blocks. The masking blocks comprise sidewalls. Polysilicon is formed along the sidewalls of the masking blocks. Subsequently, the silicon-comprising substrate and polysilicon are oxidized to form field oxide regions proximate the masking blocks.
In another aspect, the invention encompasses a semiconductive material structure. Such structure includes a semiconductive material substrate and at least one composite block over the semiconductive material substrate. The composite block comprises a layer of silicon dioxide over the substrate and having a pair of opposing sidewalls. The opposing sidewalls of the silicon dioxide are a first silicon dioxide sidewall and a second silicon dioxide sidewall. The composite block further comprises a layer of silicon nitride over the layer of silicon dioxide and having a pair of opposing sidewalls. The opposing sidewalls of the silicon nitride are a first silicon nitride sidewall and a second silicon nitride sidewall. The first silicon nitride sidewall is coextensive with the first silicon dioxide sidewall and the second silicon nitride sidewall is coextensive with the second silicon dioxide sidewall. The structure also comprises a first polysilicon projection along the coextensive first silicon nitride sidewall and second dioxide sidewall, and comprises a second polysilicon projection along the coextensive second silicon nitride sidewall and second silicon dioxide sidewall.


REFERENCES:
patent: 4927780 (1990-05-01), Roth et al.
patent: 5244823 (1993-09-01), Adan
patent: 5326715 (1994-07-01), Jang et al.
patent: 5360753 (1994-11-01), Park et al.
patent: 5374584 (1994-12-01), Lee et al.
patent: 5387538 (1995-02-01), Moslehi
patent: 5393692 (1995-02-01), Wu
patent: 5432118 (1995-07-01), Orlowski et al.
patent: 5538916 (1996-07-01), Kuroi et al.
patent: 5563091 (1996-10-01), Lee
patent: 5612248 (1997-03-01), Jeng
patent: 5629230 (1997-05-01), Fazan et al.
patent: 5837596 (1998-11-01), Figura et al.
patent: 5891789 (1999-04-01), Lee
patent: 5956600 (1999-09-01), Kuroi et al.
patent: 6153482 (2000-11-01), Su et al.
patent: 0284456 (1988-09-01), None
patent: 56-103443 (1981-08-01), None
patent: 57-63842 (1982-04-01), None
patent: 58-50754 (1983-03-01), None
patent: 62-296436 (1987-12-01), None
patent: 01-282839 (1989-11-01), None
patent: 2-116131 (1990-04-01), None
patent: 02-266545 (1990-10-01), None
Park, T., et al.,

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

LOCOS fabrication processes and semiconductive material... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with LOCOS fabrication processes and semiconductive material..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and LOCOS fabrication processes and semiconductive material... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2566470

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.