Locking of mold compound to conductive substrate panels

Details Locking of mold compound to conductive substrate panels Locking of mold compound to conductive substrate panels

2003-04-14

2004-10-26

Picardat, Kevin M. (Department: 2822)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S113000, C438S124000, C438S126000, C438S127000

Reexamination Certificate

active

06808961

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to semiconductor manufacturing, and more specifically to the manufacturing of leadless leadframe semiconductor packages
BACKGROUND
Semiconductor integrated circuits (IC's) are typically fabricated in wafer form. After the wafers are fabricated, individual die are cut from the wafer and then packaged. One method of packaging the die involves attaching multiple die, or dice, onto panels that contain arrays of leadless leadframes. Generally, a leadless leadframe includes multiple sets of electrical contact landings wherein a die is electrically connected to each of the contact landings within a set. The contacts provide the physical connection between the input and output terminals of the die and those of the circuit board. Molding material is then applied to encapsulate the die and to fix the orientation of the contact landings. While the molding material sufficiently encapsulates the arrays of the leadless leadframes and the semiconductor dies, it is typically not extended to the outer most edges of the panel. After the molding compound solidifies into the shape of molding panels, each packaged die is cut from the molded panel assembly (e.g. “singulated”) using a circular saw blade. The circular saw blade generally is guided through paths that form rows and columns along the molded panel assembly.
By way of example, FIGS.
1
and .
2
illustrate one embodiment of a molded panel assembly
100
as known in the prior art. The molded panel assembly
100
includes a conductive substrate panel
110
, which is generally a flat metal substrate configured to provide the electrical contacts (not shown) for the packaged semiconductor devices that are to be manufactured. Formed within the substrate panel
110
are multiple active areas
140
within which semiconductor dies will be attached. Each of these multiple active areas
140
contain an array of semiconductor device areas. Within each of these device areas, multiple semiconductor dies (not shown) will be positioned proximate to corresponding sets of the electrical contacts. The active areas
140
and the semiconductor dies are flood molded with molding material to form a relatively flat molding panel or cap
120
. Although the molding material is not flood molded to the outermost edges of the substrate panel
10
, it is extended to inactive buffer areas
130
beyond the perimeter of the active areas
140
. This assures that the components of the outermost semiconductor packages are sufficiently encapsulated.
The individual, packaged semiconductor devices
160
are then typically singulated from molded panel assemblies by running a circular saw blade along the singulation paths
150
. These paths
150
, represented by dashed lines, indicate the path along which the packaged semiconductor devices
160
are separated from the molded panel assembly
100
To facilitate singulation, as shown in
FIG. 3
, a contact tape
200
is adhered to the molded caps
120
of the panel assembly
100
to retain the individual, packaged semiconductor devices
160
in place during singulation. Essentially, the tape increases the overall structural integrity of the panel assembly so that the singulated components will not inadvertently detach or fracture during the singulation process.
While this technique has proven adequate to prevent such inadvertent detachment of the individual semiconductor devices
160
, in most instances, problems occur when singulating the four outer singulation paths
150
' at the peripheral edge portions of the molded cap. As can be seen in
FIGS. 1 and 3
, the outer perimeter of molding panel
120
extends out to the edge of the buffer areas
130
, but does not fully extend to the perimeter edge of the substrate panels
110
for the reasons above-mentioned. The outer edge regions
115
of the substrate panel
110
, hence, substantially overhangs the molding panel
120
. This arrangement is problematic when the singulation saw passes through these regions since the portion of the molding panels that are adhered to these outer panel edges is relatively small compared to the overhanging edge regions
115
.
Accordingly, as the rotating saw blade cuts therethrough, the forces exerted by the blade upon the molding panel
120
and the substrate panel
10
may cause separation between the singulated outer peripheral edge
114
of the molding panel
120
and the singulated outer edge region
115
(
FIG. 3
) of the panel
110
. These detached projectiles
115
are not only dangerous, but they can sever wiring, damage the panel or packaging, and/or cause processing errors or contamination within the manufacturing process. For example, the detached pieces of the substrate panel
110
may cause blade failure, premature wear or blade breakage.
The current technique to address these problems is to avoid passing the saw blade along the four outer singulation paths
150
' altogether. Although the outer edge region
115
of the substrate panel
110
is more securely attached to the molding panel
120
, the outer rows and columns
165
of each active area
140
no longer yields packaged semiconductor devices
160
. Consequently, a substantial percent of perfectly functional semiconductor packages
160
are discarded.
Another solution is to merely further extend the molding material beyond the outer rows and columns
165
of the outermost semiconductor packages
160
. Accordingly, the buffer area
130
of the outer molded panel becomes substantially larger and is therefore attached to the outer edge region
115
of the substrate panel
110
by a greater amount of surface area. Not only does this increase material costs, but the blade wear rate will also be increased.
Accordingly, in view of the foregoing, a molded panel assembly is desirable which minimizes separation of the outer edges portions of the substrate panel from the molding panel during a singulation process, and which increases the yield of usable semiconductor package devices.
SUMMARY
The present invention is directed to an apparatus and a method that substantially eliminates the separation of inactive edge portions of the substrate panel from their corresponding molding edge portions during the singulation process. This is performed by a panel assembly of packaged integrated circuit devices which include a conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area, which surrounds the periphery of the array of device areas. The locking passageways extend from a topside of the panel toward a bottom side of the panel. A molded cap is then molded over the topside of the panel to encapsulate the array of device areas and the buffer area. The molded cap includes conforming locking stem portions that extend into each of the locking passageways in a manner locking the molded cap to the substrate panel.
Accordingly, the molded mounting stems substantially increase the structural bond between the inactive edge portions of the substrate panel and the molding edge portions of the molded cap. Thus, during the singulation process of the device areas, the singulated molded cap and corresponding substrate panel will remain intact at these inactive buffer areas.
In another aspect of the invention, a method for producing the panel assembly having the locking passageways is described. The method involves providing a conductive substrate panel having the locking passageways and applying molding material to the topside of the substrate panel such that the solidified molding material forms stems that conform to the passageways.
These and other features and advantages of the present invention will be presented in more detail in the following specification of the invention and the accompanying figures which illustrate by way of example the principles of the invention.


REFERENCES:
patent: 3658596 (1972-04-01), Osborne
patent: 5278445 (1994-01-01), Uemura et al.
patent: 5652185 (1997-07-01), Lee
patent: 5692637 (1997-12-01)

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