Locking cartridge for conveniently locking very thin...

Electrical connectors – With insulation other than conductor sheath – Plural-contact coupling part

Reexamination Certificate

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Reexamination Certificate

active

06346012

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to the structure and design method for electrical connectors. More particularly, this invention relates to a new configuration and design method for manufacturing and assembling an electrical connector for power supply system. The electrical connector comprises magnetic field canceling conductive layers and locking cartridge to provide a securely locked near zero inductance power supply to reduce the voltage drop due to dynamic variations a load current
2. Description of the Prior Art
A technical difficulty is now faced by the supply industry as the computer and many different kinds of hand held electronic devices are operated with a lower direct-current (DC) voltage, i.e., DC voltage or 3.3 volts or lower, and higher loading current One major concern for providing a DC power supply to the computer or hand held devices is the voltage drop caused by connector inductance caused by variations of the dynamic loading current
FIG. 1A
is a circuit diagram showing the connector between a voltage power source
10
and a microprocessor
20
. A conventional connector typically includes two conductive lines to form a closed electric current loop. Between these conductive lines, a parasitic capacitor
30
and inductor
40
are generated. During a sleeping mode of the microprocessor, there is a very small steady DC current conducted from the power supply system
10
to the microprocessor
20
. At an instant of microprocessor wake-up, a rate of instantaneous current variation on the conductive lines is approximately two hundred amperes per microsecond, i.e., 2×10
8
A/&mgr;s. With an inductance of two nano-Henries (2.0 nH), an instantaneous voltage drop due to the connector inductance is:
L (dI/dt)=(1×10
−]
)(2×10
8
)=0.2 volts  (1)
Where (dI/dt) is the rate of current variation, L is the inductance. According to this equation, a voltage drop of 0.2 volts is generated due to a high current ramp-up rate. As a result of the connector inductance, the microprocessor
20
experiences a significant voltage drop as that shown in FIG.
1
B. At the time of the wake-up of the microprocessor
20
, there is an instantaneous increase in current and in response, a sharp voltage drop is experienced by the microprocessor
20
. Due to this sharp voltage drop, there is a serious concern that if the voltage is dropped below the minimum operation voltage required by the microprocessor for a period of time, some information might be lost during data processing. Even the voltage drop does not cause a data loss, it may cause a delay in waking up the microprocessor. Performance of the microprocessor is degraded due to the inductance induced voltage drop.
As will be described below, a near-zero inductance connector is disclosed to resolve these difficulties by providing a very thin connector comprising overlapping conductive layers as input and output terminals. Another difficulty is to provide a simplified and cost effective method to assemble the near-zero inductance connector for long term reliable operation. Because of the improved near-zero inductance connector has special layer structure, conventional methods of assembling the connector would either require soldering or bonding processes that would be very complicate and expensive. Or, if these complicate assembling processes are not used, the connector when assembled may not provide sufficient structure reliability for long term operation at a high performance level.
Therefore, an improved connector for connecting the power supply system to the microprocessor and an assembling method are required to resolve these difficulties. Specifically, a new configuration and design method are required for constructing a connector to reduce the inductance to a very low level. A connector provided with a near zero inductance would reduce the voltage drop caused by connector inductance when encountering the variations of dynamic current and also would lower the heat produced. Delay of microprocessor wake-up caused by instantaneous voltage drop can therefore be resolved by providing an electrical connector with very low inductance. Additionally, a novel locking cartridge is disclosed to securely lock the connector comprising conductive and insulation layers onto the printed circuit board without requiring complicated soldering or bonding processes to form a reliable connector to PCB attachment in implementing this novel connector.
SUMMARY OF THE PRESENT INVENTION
It is therefore an object of the present invention to provide a novel configuration and method of design and manufacturing of a connector for providing power to a microprocessor. The novel and improved connector is to significantly reduce the connector inductance during the time when there is a great rate of current variations such that the aforementioned limitations and difficulties encountered in the prior art can be overcome.
Specifically, it is an object of the present invention to provide a configuration and method of design and manufacturing of a connector for providing power to a microprocessor having a current conduction configuration with the current generated magnetic field canceled out By substantially canceling out the current generated-magnetic field, the inductance is reduced to a very low level. The voltage drop and heat production caused by connector inductance can be significantly reduced. Furthermore, a novel locking cartridge for engaging specially tapered insulation and protection cover for converting a horizontal pushing force into a vertical pressing force to securely pressing and locking multiple layers of conductive current transmission layers and insulation layer.
Another object of the present invention is to provide a configuration and method of design and manufacturing of a connector by employing parallel conductive layers for conducting DC currents wherein the current generated magnetic fluxes are mutually canceled out This novel configuration is employed on both the input end and the output end such that connector inductance can be substantially eliminated.
Another object of the present invention is to provide a configuration and method of design and manufacturing of a connector by employing parallel conductive layers for conducting DC currents insulated by a heat conductive insulation layer. Furthermore, the connector is assembled and protected by a heat conductive insulation layer such that heat generated through current conducting in the connector can be more effectively removed.
Briefly, in a preferred embodiment, the present invention discloses a direct-current (DC) electric connector that includes plurality of conductive and insulation layers constituting a near-zero inductance connector. The connector further includes a top and a bottom insulation-and-protection covers covering and protecting the plurality of conductive and insulation layers. The top and bottom insulation-and-protection covers having a tapered outer surface for providing a tapered profile along a horizontal direction toward a connector opening for receiving a printed circuit board into the near-zero inductance connector. The connector further includes a locking cartridge for adaptively enclosing the near-zero inductance connector with the printed circuit board inserted therein. The locking cartridge has top and bottom surfaces each engages the top and bottom insulation-and-protection covers respectively for horizontally pushing toward a direction having a gradually increased profile height for generating a vertical pressing force. The vertical pressing force is applied to securely pressing and locking the top and bottom insulation-and-protection covers to the plurality of conductive and insulation layers with the printed circuit board inserted therein.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment which is ill

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