Lock generator circuit for use with a dual edge register that pr

Details Lock generator circuit for use with a dual edge register that pr Lock generator circuit for use with a dual edge register that pr

1995-12-20

1998-02-17

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

327293, 327294, 327298, 327203, H03K 3356, H03K 19173

Patent

active

057195161

ABSTRACT:
A clock generator circuit for providing a clock signal to a dual-edged D-type flip-flop, enabling the flip-flop to be dual edged, single edged, or to enable a user to provide clock edge selection, asynchronous clocking, clock enabling, or a mixture of different type clock signals. The clock generator circuit includes inputs receiving first and second enables signals and a clock signal. The clock generator circuit further includes circuitry to provides an output clock signal which transitions when a rising edge of a pulse of the clock signal is received when the first clock signal is enabled, or if a falling edge of a pulse of the clock signal is received when the second clock signal is enabled.

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"Circuit Scheme to improve chip data hold time", Technical Disclosure Bulletin, Dec. 1990, vol. 33, No. 7, pp.185-189.

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