Lock-detection circuit and PLL circuit using same

Details Lock-detection circuit and PLL circuit using same Lock-detection circuit and PLL circuit using same

2008-01-15

2008-01-15

Cox, Cassandra (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S005000

Reexamination Certificate

active

07319350

ABSTRACT:
A lock-detection circuit that can set an acceptable phase-error range adapted to define a locked state and/or an unlocked state at a constant rate without being affected by a frequency and that can detect the locked state and/or the unlocked state with precision without being affected by various fluctuations and variations, and a PLL circuit including the lock-detection circuit. The range corresponding to a phase difference between first and second output signals is determined to be a locked-state range, where the phase of each of the first and second output signals delays or advances with reference to that of an oscillation-output signal transmitted from a voltage-controlled-oscillation circuit.

REFERENCES:
patent: 5126690 (1992-06-01), Bui et al.
patent: 5889436 (1999-03-01), Yeung et al.
patent: 6466058 (2002-10-01), Goldman
patent: 6704383 (2004-03-01), Lee et al.
patent: A-63-263919 (1988-10-01), None
patent: A-4-337924 (1992-11-01), None

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