Pulse or digital communications – Receivers – Interference or noise reduction
Reexamination Certificate
2000-07-13
2003-12-30
Tran, Khai (Department: 2631)
Pulse or digital communications
Receivers
Interference or noise reduction
C375S326000
Reexamination Certificate
active
06671339
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multimedia digital broadcasting receiver and, more particularly, to a lock detecting apparatus and method for a multimedia digital broadcasting receiver.
2. Description of the Related Art
A quadrature amplitude modulation (QAM) receiver is designated as the standard transmission system for cable channels in a digital television. Generally, the QAM receiver has a carrier recovery unit and a channel equalizer which primarily are used to remove noises such as frequency offset, phase offset, and ghost to minimize a mean-squared error (MSE). Accordingly, a criterion for determining whether the carrier recovery unit and the channel equalizer have removed such errors is required. Namely, a lock detector is required.
To enhance a bit error rate (BER) of the system after a pull-in of a corresponding noise, the carrier recovery unit uses gear shifting. The gear shifting method shifts a phase error detection algorithm from a blind mode to a decision-directed mode, thereby gradually decreasing the noise bandwidth of a loop filter. Such mode conversion method may be divided into a manual and automatic methods.
Compared to the automatic mode conversion method, the manual method is not as effective in coping with the randomness of a channel environment and system. Thus, the manual mode conversion method is usually inapplicable in communication modulation such as VSB, QAM, and QPSK. For this reason, most systems implement the automatic mode conversion method, which is realized by a lock detector.
FIG. 1
is a diagram of the lock detector of a multimedia digital broadcasting receiver in the related art comprising an analog/digital (A/D) converter
1
, a first mixer
2
, a first filter
3
, a second mixer
4
, a second filter
5
, a channel equalizer
6
, a first lock detecting unit
7
, a phase/frequency error detecting unit
8
, a decision device
9
, a second lock detecting unit
10
, a loop filter
11
, and a numerical control oscillator
12
.
FIG. 2
is a diagram of the second lock detector unit
10
shown in
FIG. 1
, comprising first to third comparators
10
a
~
10
c
, fourth to sixth comparators
10
d
~
10
f
, first to fourth arithmetic units
10
g
~
10
i
, a logic operator
10
k
, and a reliability counter
101
.
FIG. 3
is a diagram of a situation when constellations are rotating with a frequency offset of 256QAM.
The operation of the lock detector of a multimedia digital broadcasting receiver in the related art will next be explained with reference to FIGS.
1
~
3
.
First, the A/D converter
1
converts receives and converts a QAM signal to a corresponding digital signal. The first mixer
2
mixes an intermediate frequency (IF) QAM signal converted by the A/D converter
1
with COS(&phgr;) and outputs a first mixed signal. The first filter
3
removes noises from the first mixed signals output by the first mixer
2
and band filters the noise-removed first mixed signals to output a first filtered signal. The second mixer
4
mixes the IF QAM signal from the A/D converter
1
with SIN(&phgr;) and outputs a second mixed signal. The second filter
5
removes noise from the second mixed signal and band filters the noise-removed second mixed signals to output a second filtered signal. Here, the first and second filters
3
and
5
are square root RC filters.
Thereafter, the channel equalizer
6
changes from a blind mode to a decision-direct mode and converts the filter structure in order to enhance the BER performance of the system after removing noises, i.e. ghost, included in the signals filtered by the first and second filters
3
and
5
. To automatically control the conversion from the blind mode to the decision-direct mode, the first lock detecting unit
7
detects the signal from the channel equalizer
6
.
The phase/frequency error detector
8
detects phase/frequency errors from the signal output by the channel equalizer
6
to generate a demodulated signal constellation. The decision device
9
detects and outputs a decision constellation based on the demodulated signal constellation from the phase/frequency error detector
8
. Finally, the second lock detecting unit
10
detects variations in the demodulated signal constellation from the phase/frequency error detector
8
and in the decision constellation from the decision device
9
.
Particularly, as shown in
FIG. 2
, the first to third comparators
10
a
~
10
c
in the second lock detecting unit
10
compare the position of the rotating demodulated constellation signal (I_Constellation) output by the phase/frequency error detector
8
with a positive axis of the in-phase axis, 0 and a negative axis corresponding to the positive axis. The fourth to sixth comparators
10
d
~
10
f
compare the position of the rotating demodulated constellation signal (Q_Constellation) output by the phase/frequency error detector
8
with a positive axis of the quadrature-phase axis, 0 and a negative axis. The orbit of an energy band of the rotating constellation will be detected according to Equation 1 below.
E
={square root over ((
I
_constellation
2
+Q
_constellation
2
)} [Equation 1]
Thereafter, the first arithmetic unit
10
g
performs an operation on signals output by the first and fifth comparators
10
a
and
10
e
. Namely, the first arithmetic unit
10
g
uses a multiplier to multiply the output signal of the first comparator
10
a
by the output signal of the fifth comparator
10
e
, and generates a resulting signal Window_
1
. Similarly, the second arithmetic unit
10
h
uses a multiplier to multiply the output signal of the second comparator
10
b
by the output signal of the fourth comparator
10
d
, and generates a resulting signal Window_
2
. The third arithmetic unit
10
i
uses a multiplier to multiply the output signal of the third comparator
10
c
by the output signal of the fifth comparator
10
e
, and generates the resulting signal Window_
3
. The fourth arithmetic unit
10
j
uses a multiplier to multiply the output signal of the second comparator
10
b
by the output signal of the sixth comparator
10
f
, and generates the resulting signal Window_
4
.
Also, the first to sixth comparators
10
a
~
10
f
and the first to fourth arithmetic units
10
g
~
10
j
are configured to program a quantitative value of a window size to be within 4QAM and 256QAM.
The logic operator
10
k
performs a logic operation to the signals output by the first to fourth arithmetic units
10
g
~
10
j
. Namely, the logic operator
10
k
is an OR gate that performs an OR operation on signals Window_
1
to Window_
4
output by the first to fourth arithmetic units
10
g
~
10
j
to generate, for any one window, a “logical 1” upon receiving a rotating demodulated constellation signal or a “logical 0” upon failure of receiving a constellation signal.
The reliability counter
101
counts the signals output by the logic operator
10
k
based on a symbol clock for a predetermined period of time. Particularly, the reliability counter
101
enables a lock detection when a “logical 0” occurs for the predetermined time while counting the signals from the logic operator
10
k
based on the symbol clock. The reliability counter
101
disables a lock detection when a “logical 1” occurs for the predetermined time while counting the signals from the logic operator
10
k
based on the symbol clock.
Generation of the “logical 1” from the reliability counter
101
implies that the noises are still in a pull-in state in the carrier recovery block and that it is not time for switching the pull-in noise bandwidth of the loop filter
11
. After an elapse of time, upon a pull-in of the noises in the carrier recovery block, the orbit of the energy band would no longer rotate and would become nearly in a form of a square. Thus, the reliability counter
101
would generate “logical 0”. As a result, the carrier recovery enables lock detection and gear-shifts the pull-in noise bandwidth of the loop filter
11
to a locking noise bandwidth in order to reduce
Birch & Stewart Kolasch & Birch, LLP
LG Electronics Inc.
Tran Khai
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