Oscillators – With indicator – signal – or alarm
Patent
1996-06-12
1997-04-29
Mis, David
Oscillators
With indicator, signal, or alarm
331 8, 331173, 331DIG2, H03L 706, H03L 7095
Patent
active
056253265
DESCRIPTION:
BRIEF SUMMARY
This application claims benefit of international application PCT/FI95/00564 filed Oct. 11, 1995.
This invention relates to a lock alarm circuit of such a synthesizer comprising a locking detector and allowing deactivating of the synthesizer by switching off the operating voltage from a voltage controlled oscillator and buffers.
A synthesizer generally comprises a controllable phase locked loop PLL. A PLL comprises a voltage-controlled oscillator VCO, a phase detector and a low-pass filter. A reference frequency signal is applied to a first input of the phase detector, and the feedback output signal of the oscillator, providing also an output signal for the loop, is applied to a second input of the phase detector. In numerous applications, such as frequency synthesizers, the feedback branch is equipped with is a loop divider, the division ratio of which may be changed by means of software. The frequency of the output signal is thus divided prior to applying it to the phase detector, which allows forming frequencies which are significantly higher than the reference frequency, yet bound to it.
The phase detector detects a phase difference between the input signals and generates an output signal which is proportional to the phase difference, and applied to a low-pass filter which acts as a loop filter. Its output voltage, in turn, provides the control voltage for the voltage-controlled oscillator. When the loop is in balance, the phase of an output frequency signal is locked onto the phase of a reference frequency signal.
The phase lock must be designed so as to maintain its balance and prevent the output signal from modulating despite rapid fluctuation, such as jitter, occurring in either of the input signals, and, on the other hand, to enable a minimal signal acquisition time when the output frequency is changed. Great demands are thus made on the loop filter, and these demands are inconsistent with each other. When the loop is locked, the cut-off frequency of the filter must be low so that the noise of the input signal will not appear as modulation at the output, whereas during the setting, where the output frequency is changed, the cut-off frequency of the loop must be high to enable a short signal acquisition time.
The information on whether the loop is locked or not is essential in most applications. Therefore, the loop is equipped with a so-called locking detector that generates an alarm signal when the loop is not in balance. One detector is disclosed e.g. in U.S. Pat. No. 4,135,165. The detector per se is beyond the scope of this invention.
The change of the frequency of the synthesizer is carried out in the way disclosed above by changing the division ratios of the loop divider consisting mostly of several dividers. The ratios are changed by means of software, that is the synthesizer is supplied with a code from outside the circuit, e.g. from a microprocessor, said code corresponding to certain division ratios. There are several embodiments. In one embodiment, which is disclosed in U.S. Pat. No. 4,330,758, a code, which is also an address, is decoded by reading from the PROM memory the data corresponding to the division ratio, stored in the address, and conveying the data to the sample and hold circuit of data, from which it is fed to the divider at a given moment. If the operating voltage of the synthesizer circuit for some reason or another disappears, the data recorded in the sample and hold circuit will also disappear. In that case, upon switching the synthesizer on again, the entire process must be repeated for feeding the division ratios to the dividers.
Activating the synthesizer upon switching on the supply power is well known in the art. Instead, the problem lies in putting the synthesizer to sleep for a moment, i.e. deactivating and activating it, without the alarm circuit giving an unnecessary alarm. In such an equipment configuration in which the synthesizer is used only occasionally, it would be advantageous if it were possible to deactivate the synthesizer, i.e. to switch off the electr
REFERENCES:
patent: 4135165 (1979-01-01), Coe
patent: 4330758 (1982-05-01), Swisher et al.
patent: 4499434 (1985-02-01), Thompson
patent: 5304953 (1994-04-01), Heim et al.
patent: 5319798 (1994-06-01), Watanabe
Patent Abstracts of Japan, vol. 14, No. 168, E-912, Abstract of JP, A, 2-25112 (Matsushita Electric Ind Co Ltd), 26 Jan. 1990, Michio Tsuneoka.
Mis David
Nokia Telecommunications Oy
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