Location-specific NAND (LS NAND) memory technology and cells

Details Location-specific NAND (LS NAND) memory technology and cells Location-specific NAND (LS NAND) memory technology and cells

2007-06-05

2007-06-05

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185180

Reexamination Certificate

active

11174333

ABSTRACT:
The use of a Nitride layer or a silicon-nodule layer capable of location-specific (LS) charge storage, allow easy vertical scaling and implementation of NOR and NAND NVM array and technology. If the charge is stored in the traps in the Nitride storage layer, a Oxide Nitride Oxide is used as the storage element and if charge is stored in potential wells of discrete silicon-nodules, or Carbon Buckyball layers, an Oxide silicon-nodule Oxide storage element, or an Oxide Buckyball Oxide layer is used as the storage element.The problem of location-specific NAND memory is the inability to erase the cells with repeatable results. A novel erase method, Tunnel Gun (TG) method, that generate holes for consistent erase of LS storage elements and typical NAND Cells that erase by the disclosed method and programmed by either by Fouler-Nordheim (FN) tunneling or Low Current Hot Electron (LCHE) method are disclosed.

REFERENCES:
patent: 6324091 (2001-11-01), Gryko et al.
patent: 6580642 (2003-06-01), Wang
patent: 2006/0280000 (2006-12-01), Thomas

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