Localized ATD summation for a memory

Details Localized ATD summation for a memory Localized ATD summation for a memory

1993-05-03

1994-06-21

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Sync/clocking

365189110, 36523003, G11C 800

Patent

active

053233603

ABSTRACT:
A memory (110) having sections of memory cells used ATD to generate the required timing signals, includes ATD generators (189), first summation circuits (180-183), and local summation circuits 185-187. An ATD pulse is generated by the ATD generators (189) when an address signal transitions from one logic state to another. The outputs of the ATD generators (189) are wired-OR connected to input terminals of first summation circuits (180-183). A first summation signal is provided by the first summation circuits (180-183) to each of the local summation circuits (185-187). The local summation circuits (185-187) are positioned in the vicinity of the areas where the timing signals are used. Localized generation of the ATD signals prevents the timing signals for being excessively skewed from each other in different portions of the memory (110).

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