Local word line decoder for memory with 2 1/2 MOS devices

Details Local word line decoder for memory with 2 1/2 MOS devices Local word line decoder for memory with 2 1/2 MOS devices

1997-10-06

1999-04-20

Nelms, David

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36518905, 36523008, G11C 800, G11C 700

Patent

active

058963448

ABSTRACT:
A method, a circuit, and a structure are disclosed by which the semiconductor area is reduced that a local word line decoder for a memory array requires. This reduction in area size has been achieved by eliminating one transistor of a three transistor local wordline decoder and introducing a fifth transistor which is shared by two local wordline decoders. The area occupied by the two eliminated transistors is no longer needed because the fifth transistor can be fitted between two existing transistors without an increase in area.

REFERENCES:
patent: 5446698 (1995-08-01), McClure
patent: 5587960 (1996-12-01), Ferris
patent: 5608678 (1997-03-01), Lysinger
patent: 5612918 (1997-03-01), McClure
patent: 5648933 (1997-07-01), Slemmer

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