Local signal generation arrangement

Telecommunications – Transmitter and receiver at same station – With frequency stabilization

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Details

455202, 455259, 331 18, 455316, H04B 140

Patent

active

042119758

ABSTRACT:
The local signal generation arrangement employed in a radio communication system for transmitting and/or receiving an upper sideband (USB) and a lower sideband (LSB) signal, but not simultaneously, employs a method in which the generation and/or detection of both USB and LSB signals is accomplished by utilizing only one bandpass filter, a so-called single sideband (SSB) filter, together with a balanced modulator arranged to receive a carrier signal produced from an oscillator whose frequency is accordance with the characteristic frequency of either of a pair of crystal resonators, which correspond to the upper cut-off and the lower cut-off frequencies of the SSB bandpass filter, respectively. The output signal from the said SSB filter is referred to herein as the intermediate frequency (IF) signal.
The local signal generation arrangement includes a phase-locked loop (PLL) including at least a phase comparator, a low pass filter, and a voltage-controlled oscillator (VCO). The arrangement further includes a standard signal oscillator, a frequency divider, and a pair of quartz crystal resonators used for the USB mode and for the LSB mode, respectively. The PLL further includes in its feedback loop a programmable frequency divider the division ratio of which is determined by a digital signal fed in parallel form from a channel selection means. The PLL optionally includes a mixer and a frequency selection means which is adapted to select one of harmonics produced from the mixer. These may be incorporated in order to reduce the frequency of the signal to be divided by the programmable frequency divider. If the mixer and the frequency selective means are used, then the arrangement also includes a frequency multiplier adapted to produce an output signal the frequency of which is an integral multiple of that of the input to said frequency multiplier.

REFERENCES:
patent: 4027242 (1977-05-01), Yamanaka
patent: 4061973 (1977-12-01), Reimers et al.
patent: 4086545 (1978-04-01), Teshirogi
patent: 4095183 (1978-06-01), Kakigi

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