Local row decoder for sector-erase fowler-nordheim tunneling bas

Details Local row decoder for sector-erase fowler-nordheim tunneling bas Local row decoder for sector-erase fowler-nordheim tunneling bas

1997-10-27

1999-03-23

Nelms, David

Static information storage and retrieval

Floating gate

Particular connection

36518513, 36518529, 36518533, G11C 1604

Patent

active

058869239

ABSTRACT:
A semiconductor non-volatile memory device is disclosed which is based on the use of Fowler Nordheim electron tunneling to charge and discharge the isolated gates of the storage cells. The disclosed memory device includes global decoder circuitry capable of passing either positive or negative voltages to a set of global word lines controlling, local decoder circuitry. The local decoder includes a set of word line drivers, each of which sets the voltage level of a corresponding local word line in response to the voltage levels of its associated global word line and a collection of control signals. Each word line driver includes one p-channel transistor and two n-channel transistors. These three transistors collectively establish selected local word lines at appropriate voltages for erase, program and read operations. The three transistors also establish unselected local word lines at solid bias voltages that prevent disturbance of memory cells that are not the target of a memory operation.

REFERENCES:
patent: 5274597 (1993-12-01), Ohbayashi et al.
patent: 5663923 (1997-09-01), Baltar et al.
patent: 5732040 (1998-03-01), Yabe
Shin-ichi Kobayashi, Hiroaki Nakai, Yuichi Kunori, Takeshi Nakayama, Yoshikazu Miyawaki, Yasushi Terada, Hiroshi Onoda, Natsuo Ajika, Masahiro Hatanaka, Hirokazu Miyoshi, Tsutomu Yoshihara, "Memory Array Architecture and Decoding Scheme for 3V Only Sector Erasable DINOR Flash Memory", IEEE Journal of Solid-State Circuits, vol. 29, No. 4, Apr. 1994, pp. 454-458.

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