Local clock generator

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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Details

327155, 327236, H03L 723

Patent

active

054732743

ABSTRACT:
A local clock system uses a numerically controlled oscillator referenced to a stable oscillator to generate local clock signals under microprocessor control. Two feedback loops provide inputs to the microprocessor for maintaining synchronization with the external clock reference; a frequency locked and a phase-locked loop. The relatively wide-band frequency-locked loop is used to acquire initial synchronization with the external clock reference when the external clock is restored after having been lost or is switched to a new source. The phase-locked loop has a narrow bandwidth and provides a large attenuation of any jitter on the incoming reference with a resultant low output jitter. The microprocessor provides a hold-over operation upon loss of the external clock reference and when the external reference is restored it slowly adjusts the output clock frequency to match that of the reference, limiting the rate of adjustment so as not to exceed a specified allowable jitter in the local clock output.

REFERENCES:
patent: 3646452 (1972-02-01), Horowitz et al.
patent: 4069462 (1978-01-01), Dunn
patent: 4272729 (1981-06-01), Riley, Jr.
patent: 4357707 (1982-11-01), Delury
patent: 4808884 (1989-02-01), Hull et al.
patent: 5287010 (1994-02-01), Hagiwara

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