Patent
1994-12-01
1997-10-14
Auve, Glenn A.
395309, G06F 1314
Patent
active
056780648
ABSTRACT:
A method and arrangement is provided to support both fast Programmed Input/Output (PIO) and third party Direct Memory Access (DMA) data transfers between a system memory and Integrated Drive Electronics (IDE) drives. A DMA controller attached to an ISA bus supplies address, read and write signals in third party DMA data transfers. An IDE controller provides control signals to support the DMA data transfers. The IDE controller additionally provides address and control signals to support the PIO data transfers at local bus speeds. A local bus-ISA bridge is incorporated to support the system memory that resides on the local bus. An arbitration circuit arbitrates access to the ISA bus, and allows the IDE controller to seize the ISA bus for fast PIO data transfer.
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Bland Patrick Maurice
Katz Sagi
Kulik Amy L.
Moeller Dennis
Wall William Alan
Auve Glenn A.
International Business Machines - Corporation
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