LOC semiconductor package

Details LOC semiconductor package LOC semiconductor package

1995-08-02

1998-10-13

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

257668, 257691, H01L 2348

Patent

active

058216057

ABSTRACT:
A semiconductor package is disclosed including a semiconductor chip having a plurality of bonding pads on its top surface; a plurality of inner leads located above the semiconductor chip and electrically connected to the bonding pads by wire; a plurality of outer leads extending from the respective inner leads; and at least one bus bar for power supply and ground formed to be lower than the inner leads above the semiconductor chip. A method of packaging a semiconductor device is disclosed including the steps of: providing a semiconductor chip having a plurality of bonding pads on its top surface; arranging a plurality of inner leads and a plurality of outer leads extending therefrom above the semiconductor chip; and arranging bus bars for power supply and ground to be lower than the inner leads above the semiconductor chip.

REFERENCES:
patent: 5227232 (1993-07-01), Lim
patent: 5286999 (1994-02-01), Chiu

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