Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2003-07-11
2004-10-26
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S112000, C327S436000
Reexamination Certificate
active
06809560
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a load sensing circuit for a power MOSFET switch and, in particular, to load sensing of a small current in a high ripple condition across a power MOSFET switch.
DESCRIPTION OF THE RELATED ART
A switching regulator, also referred to as a switching mode power supply, provides the power supply function through low loss components such as capacitors, inductors, and transformers, and power switches that are turned on and off to transfer energy from the input to the output in discrete packets. A feedback control circuit is used to regulate the energy transfer to maintain a constant output voltage within certain load limits of the circuit.
FIG. 1
illustrates an output stage of a conventional switching regulator. In
FIG. 1
, an upper switch
2
(a PMOS transistor) and a lower switch
4
(an NMOS transistor) are connected in series between a positive power supply VIN and ground (or a negative power supply). The switch output voltage V
SW
(on node
5
) of the power switches is coupled to an LC filter circuit
11
to generate an output voltage V
OUT
(on node
13
) having substantially constant magnitude for driving a load
12
. The power switches (upper switch
2
and lower switch
4
) are controlled by a driver circuit
6
receiving a control signal Gate_Drive on lead
1
. Control signal Gate_Drive controls the on and off state of the two power switches. Generally, the control signal Gate_Drive has two active states: a first state for turning on lower switch
4
and turning off upper switch
2
and vice versa for the second state. A passive state can also exist where both switches are turned off. The control signal and related circuitry for putting the power switches in the passive state is not shown in FIG.
1
.
Driver circuit
6
generates gate control signals PGATE and NGATE for the upper switch
2
and low switch
4
, respectively.
FIG. 1
illustrates one exemplary embodiment of a driver circuit which may be used to drive power switches
2
and
4
. In
FIG. 1
, driver circuit
6
includes an upper driver device
7
and a lower driver device
8
, each being driven by respective logic circuits
9
and
10
. Logic circuits
9
and
10
may include circuit elements for putting upper switch
2
and lower switch
4
in the passive state. Logic circuits
9
and
10
may also include delay circuits for introducing delays to the Gate_Drive control signal for protecting against “shoot-through” conditions at the power switches. Upper driver device
7
and lower driver device
8
drive power switches
2
and
4
in response to control signal Gate_Drive so that only one power switch is turned on at a time. When the control signal Gate_Drive is in its active states, gate control signals PGATE and NGATE are logically equivalent to the Gate_Drive control signal, except for the delays in the PGATE and NGATE signals which may be introduced by the logic circuits
9
and
10
in driver circuit
6
for anti-shoot-through protection.
Control signal Gate_Drive is generated by a feedback control circuit (not shown in
FIG. 1
) operating to regulate the output voltage V
OUT
at a certain desired voltage level. A common technique used in the feedback control is pulse-width modulation (PWM). That is, the output voltage V
OUT
is regulated by controlling the duty cycle, that is, varying the pulse width, of the rectangular voltage V
SW
applied to the inductor and the capacitor of filter circuit
11
. PWM feedback control can be implemented as current mode control or voltage mode control.
Current mode and voltage mode switching regulators are well known in the art and will only be described in brief here. In current mode control, the output voltage V
OUT
is fed back through a voltage divider to one input of a difference amplifier whose other input is connected to a voltage reference. The output of the difference amplifier is an error voltage. The output current of the switching regulator is sensed and the sensed current signal is compared against the error voltage for generating the Gate_Drive signal to control the power switches. In operation, the upper switch is turned on long enough so that the current in the inductor ramps up to the threshold set by the error voltage. In voltage mode control, the output voltage V
OUT
is fed back through a voltage divider to one input of a comparator whose other input is connected to a voltage reference. The output of the comparator is an error voltage which error voltage sets the threshold of a second comparator whose other input is coupled to receive a ramp signal. The output of the second comparator forms the control signal Gate_Drive. In operation, the greater the error voltage, the higher the comparator threshold on the second comparator and the longer the upper power switch is held on to provide energy to filter circuit
11
.
It is well known that the efficiency of the switching regulator is affected by various factors including conduction losses from the internal resistance of the MOS transistors used as the power switches and gate drive losses due to charging and discharging of the MOS transistors' gate capacitance. The load condition at which the switching regulator is being operated also has a significant impact on the efficiency of the switching regulator. Specifically, switch regulators can become very inefficient at light load (low output current) conditions due to the large gate current required to charge the large gate capacitance of the power switches. Thus, switching regulators typically employ some form of current sensing at the lower switch to detect a light load condition and adjust the regulator operation in response in order to maintain regulator efficiency.
In general, a current mode switching regulator uses current sense techniques to detect light load conditions and responds to the light load conditions by varying the switching frequency of the switch output voltage V
SW
. Specifically, the switching frequency is reduced in light load conditions so that the charging and discharging of the large gate capacitance of the power transistors no longer represent a significant power loss for the switching regulator. Varying frequency operation can be effective in improving light load efficiency but presents some undesirable side effects. First, varying the switching frequency requires a finite amount of time such that such a current mode switching regulator often cannot be operated at very high speed. Also, varying the switching frequency introduces a wide noise spectrum which cannot be readily filtered out. The introduction of a wide noise spectrum prevents the switching regulator from being used in communication equipments where the undesired noise spectrum may interfere with the transmitted signals. However, when these side effects are taken into considerations, current mode switching regulators can effectively employ a varying frequency operation to improve light load efficiency. Of course, varying frequency operation can also be applied in a voltage mode switching regulator for improving light load efficiency.
However, the conventional current sense techniques for light load detection are not desirable for voltage mode switching regulators. Conventional current sense techniques typically involve using a resistor at the NMOS transistor (the lower switch) to measure the current flowing through the NMOS transistor. Other current sensing techniques include measuring the voltage across the NMOS transistor directly. These techniques are not suitable for voltage mode switching regulators because of the switching requirements of the switch output voltage V
SW
at the common node of the power switches.
FIG. 2
illustrates representative voltage waveform of voltage V
SW
at the common node of the power switches during the operation of a voltage mode switching regulator. In operation, there is typically a ripple current of about 100 mA in the lower switch (an NMOS transistor). To detect light load condition, a small DC signal needs to be extracted from the large ripple current where the DC signal is due
Cook Carmen C.
Micrel Inc.
Patent Law Group LLP
Wells Kenneth B.
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