Load sensing buffer circuit with controlled switching...

Details Load sensing buffer circuit with controlled switching... Load sensing buffer circuit with controlled switching...

2007-03-20

2007-03-20

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C326S082000, C326S083000

Reexamination Certificate

active

11003779

ABSTRACT:
A load sensing buffer circuit for providing a buffered clock signal with controlled switching current noise (di/dt) in which the input clock signal is selectively gated to provide successively generated source and sink current components as part of the buffered output signal, with the timing of such current components being dependent upon load capacitance.

REFERENCES:
patent: 4779013 (1988-10-01), Tanaka
patent: 4961010 (1990-10-01), Davis
patent: 5036222 (1991-07-01), Davis
patent: 5081374 (1992-01-01), Davis
patent: 5121013 (1992-06-01), Chuang et al.
patent: 5864244 (1999-01-01), Kaplinsky
patent: 6272577 (2001-08-01), Leung et al.
patent: 6281706 (2001-08-01), Wert et al.
patent: 6760209 (2004-07-01), Sharpe-Geisler
patent: 6870391 (2005-03-01), Sharpe-Geisler

Affiliated with

Also associated with

Rating

Load sensing buffer circuit with controlled switching... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Load sensing buffer circuit with controlled switching..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Load sensing buffer circuit with controlled switching... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3791964