Load distribution among parallel DC-DC converters

Details Load distribution among parallel DC-DC converters Load distribution among parallel DC-DC converters

1981-04-29

1983-02-01

Shoop, William M.

Electric power conversion systems

Current conversion

Having plural converters for single conversion

363 21, 363 80, 363 56, H02M 3335

Patent

active

043719198

ABSTRACT:
A control circuit (36) on the primary side of a converter senses the output voltage and is useful for modulating the drive pulse width of a switching transistor (30). An averaging circuit (78) averages the drive pulse and compares this average with an average of the drive pulses for all switching transistors in a system of parallel converters to produce an error signal. In response to the error signal, the drive pulse width is varied so that the load current is distributed evenly among the parallel converters to improve the system efficiency.

REFERENCES:
patent: 3916283 (1975-10-01), Burrows
patent: 3956638 (1976-05-01), Ahrens et al.
patent: 4074146 (1978-02-01), Buonavita
patent: 4150425 (1979-04-01), Nagano et al.
patent: 4270165 (1981-05-01), Carpenter et al.
patent: 4276590 (1981-06-01), Hansel et al.
Mele, "100-KHz DC/DC Converter uses FETs", EDN, vol. 25, No. 17, Sep. 20, 1980, pp. 191-192.
Regan et al., "Design for VMOS Push-Pull Converters", Electronic Engineering, vol. 52, No. 638, May 1980, pp. 87-96.
"Regulating Pulse Modulator", Silicon General Linear Integrated Circuits Product Catalog, 1979, pp. 23-26.
"Application Notes-SG1524", Silicon General Linear Integrated Circuits Product Catalog, 1979, pp. 136-150.

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