Load board

Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...

Reexamination Certificate

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Details

C439S072000, C174S260000, C361S774000

Reexamination Certificate

active

07094068

ABSTRACT:
A load board for packaged IC testing. The load board with predetermined testing circuit thereon has bonding pad areas on its surface. A plurality of bonding pads is formed on the bonding pad areas, each of which is disposed corresponding to a lead of a packaged IC for testing connection, such as a quad flat packaged IC (QFP), a dual inline packaged IC (DIP) or a small outline packaged IC (SOP). The bonding pads on the load board connect the leads of the testing IC directly during IC testing, thus the conventional test socket between a conventional load board and a packaged IC is omitted.

REFERENCES:
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patent: 5563509 (1996-10-01), Small
patent: 5731547 (1998-03-01), Derwin et al.
patent: 5866941 (1999-02-01), Lacap
patent: 6262477 (2001-07-01), Mahulikar et al.
patent: 6262583 (2001-07-01), Martin et al.
patent: 6293808 (2001-09-01), Ochiai
patent: 6740352 (2004-05-01), Lee et al.
patent: 6760223 (2004-07-01), Wells et al.
patent: 466656 (1989-01-01), None

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