Load actuation circuit

Details Load actuation circuit Load actuation circuit

2000-09-28

2002-05-28

Berhane, Adolf Deneke (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C327S538000

Reexamination Certificate

active

06396249

ABSTRACT:

BACKGROUND OF THE INVENTION
1) Field of the Invention
The present invention relates to a load actuation circuit for driving a load, and more particularly to a load actuation circuit having a function to place a limit on a load current below a predetermined current value.
2) Description of the Related Art
So far, as a load actuation circuit designed to limit a load current when the load current falls into an excess current condition, there has known one disclosed in Japanese Unexamined Patent Publication (HEI) 2-226808, in which a current detection transistor (which will be referred to hereinafter as a “detection transistor”) comprising a MOS transistor whose drain and gate are respectively connected to a drain and gate of a MOS transistor forming an output transistor in the form of common lines is provided, and gates and one transistor (which will be referred to hereinafter as a “first transistor”) constituting a current mirror circuit is located on the source side of this detection transistor so that a load current flowing through the output transistor into a load is limited below a predetermined value by controlling a gate voltage of the output transistor according to a current flowing through the other transistor (which will be referred to hereinafter as a “second transistor”) organizing the same current mirror circuit.
There is a problem which arises with the load actuation circuit disclosed in this publication, however, in that, since the gate of the output transistor and the gate of the detection transistor are connected through a resistor to each other or directly wired together, difficulty is encountered in establishing the correspondence between the gate-source voltage of the output transistor and the gate-source voltage of the detection transistor, which can cause no coincidence in operating point between these transistors.
That is, the first transistor constituting the current mirror circuit is connected to the source side of the detection transistor whereas no transistor is coupled to the source side of the output transistor; therefore, an electric potential difference corresponding to a voltage drop (in a case in which the first transistor is a bipolar transistor, the forward voltage Vf in a P-N junction becomes approximately 0.7V), developing due to a current flowing through the first transistor, occurs between the source electric potentials of these transistors, thereby causing a difference in operating point between the output transistor and the detection transistor.
The occurrence of an operating point difference makes it difficult to precisely detect a load current flowing from the detection transistor to the output transistor so that high-accuracy current limitation becomes unfeasible.
Meanwhile, as a load actuation circuit capable of solving such a problem, this applicant has already proposed a circuit arrangement in which a voltage drop means is located between a gate of an output transistor and a gate of a detection transistor to produce a voltage drop equal to that in a first transistor (Japanese Unexamined Patent Publication (HEI) 10-32475).
Referring to
FIG. 15
, a description will be given hereinbelow of an example of this proposed load actuation circuit.
FIG. 15
shows a load actuation circuit in which an N-channel MOS transistor is employed as each of an output transistor To and a detection transistor Ts, and the drain of the output transistor To is connected through an output terminal
4
to one terminal of a load
2
, with the other terminal thereof receiving a positive power-supply voltage from the positive terminal (electrode) of a direct-current power source for load actuation, while the source of the output transistor To is coupled through an output terminal
6
to the ground equal in electric potential to the negative terminal (electrode) side of the dc power source so that the output transistor To operates as the so-called low-side switch.
In addition, as
FIG. 15
shows, according to the above-mentioned proposed load actuation circuit, the drain of the detection transistor Ts is connected to the drain of the output transistor To and the source of the detection transistor Ts is connected to the source of the output transistor To through one transistor (first transistor) Ta constituting a current mirror circuit
10
, with the other transistor (second transistor) Tb of the same current mirror circuit
10
being connected between the gate and source of the output transistor To, and even a voltage drop means
20
which produces a voltage drop in the first transistor Ta due to a current proportional to a load current flowing through the detection transistor To and reaching the first transistor Ta is provided between the gates of the output transistor To and the detection transistor Ts.
Accordingly, with the foregoing proposed load actuation circuit, while a load current flows through the output transistor To, the drain-source voltage of the output transistor To agrees with the drain-source voltage of the detection transistor Ts to cause a current proportional to the load current to flow certainly in the detection transistor Ts; therefore, as compared with a case in which the drains of the output transistor To and the detection transistor Ts are connected directly to each other or connected to each other in a state where a resistor is interposed therebetween, the load current flowing through the output transistor To is limitable with higher accuracy.
However, in the case of the foregoing proposed load actuation circuit, as
FIG. 15
shows, a constant-voltage circuit
50
is provided to generate a constant voltage from a power-supply voltage fed from the external through a power supply terminal
8
so that the constant voltage generated by the constant-voltage circuit
50
is applied through a resistor Ra to a control terminal (concretely, gate) of the detection transistor Ts to actuate the output transistor To and the detection transistor Ts at the constant voltage; therefore, because of the non-uniformity of the output transistor To or the resistor Ra, its temperature property, or the like, there exists a probability of difficulty being experienced in controlling the load current flowing through the output transistor To to a design value.
More concretely, as obvious from a VGS-ID characteristic curve shown in
FIG. 16
, a load current (in other words, drain current) ID flowing through the output transistor To rises rapidly with an increase in gate-source voltage VGS.
Meanwhile, in the load actuation circuit shown in
FIG. 15
, a current supplied from the constant-voltage circuit
50
through the resistor Ra to the gate side of the detection transistor Ts depends on a resistance value of the resistor Ra and a voltage across the resistor Ra, thus lowering as the gate-source voltage VGS of the output transistor To increases. For this reason, a supply-possible current (in detail, a conversion value of this current into a drain current ID) from the constant-voltage circuit
50
to the second transistor Tb of the current mirror circuit
10
also decreases as the gate-source voltage VGS of the output transistor To increases, as seen from a supply current characteristic indicated by a solid line in FIG.
16
.
In addition, in the load actuation circuit shown in
FIG. 15
, when a current (current proportional to the load current) flowing from the detection transistor Ts to the first transistor Ta of the current mirror circuit
10
fails of its supply to the second transistor Tb, the gate voltage of the output transistor To lowers to limit the load current (drain current ID) to the current value at that time so that the limit values of the load current become drain current values ID at the intersections (indicated by black circles in
FIG. 16
) of the MOS transistor VGS-ID characteristic and the supply current characteristic.
However, as indicated by dotted lines in
FIG. 16
, the MOS transistor VGS-ID characteristic varies in accordance with the non-uniformity of characteristic of the MOS transistor itself or its temperature variation or fluctuation, and

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