Live-insertion PMOS biasing circuit for NMOS bus switch

Miscellaneous active electrical nonlinear devices – circuits – and – Gating

Reexamination Certificate

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Details

C327S365000, C327S534000, C326S086000, C326S087000

Reexamination Certificate

active

06608517

ABSTRACT:

BACKGROUND OF INVENTION
This invention relates to hot-plug isolation circuits, and more particularly to a pull-up biasing circuit when powered down.
High-speed computer and communication systems often employ networks. On a physical level, these networks have cables that connect together stations, and these cables are in turn connected together using relays or bus switches.
Bus switches are semiconductor integrated circuits (IC's) that use metal-oxide semiconductor (MOS) transistors to make or break the connection. Several switches may be combined on a single silicon die. One such device is made by the assignee and marketed as the PI5C3861 Bus Switch. More background on bus switches can be found in Parallel Micro-Relay Bus Switch for Computer Network Communication with Reduced Crosstalk and Low On-Resistance using Charge Pumps, U.S. Pat. No. 5,808,502, also “Bus Switch Having Both P- and N-Channel Transistors for Constant Impedance Using Isolation Circuit for Live-Insertion when Powered, U.S. Pat. No. 6,034,553.
FIG. 1
shows a prior-art bus switch device. N-channel transistor
10
conducts current from its drain to its source, connecting signal lines from two buses
20
,
26
when an enable signal EN is applied to the gate of n-channel transistor
10
. Bus switches are usually large in size to allow a large amount of current to flow, and to provide a low on resistance.
Pullup transistor
12
also has its gate connected to enable signal EN. However, since pullup transistor
12
is a p-channel device, it turns on when EN is low, when bus-switch n-channel transistor
10
is off. Pullup transistor
12
pulls hot bus
20
high to prevent a floating bus
20
or provides termination. A bias voltage other than the power-supply may be used with the pullup.
When power is off, enable signal EN is floating, and the gate of n-channel transistor
10
is also floating since a preceding inverter (not shown) that drives signal EN has no power. Since charge leaks off after a period of time, it is likely that the gate of n-channel transistor
10
is at ground when powered off. Thus n-channel transistor
10
does not conduct current from hot bus
20
to second bus
26
when powered off, regardless of the voltages on hot bus
20
and second bus
26
.
However, p-channel pullup transistor
12
may conduct when power is off.
FIG. 2
shows a prior-art bus switch with a pullup that conducts when power is off. When power is disconnected, EN is low turning off transistor
10
. However, the low EN signal applied to the gate of p-channel pullup transistor
12
may allow it to conduct. When hot bus
20
is high, and power (Vdd or Vcc) is low, transistor
12
can conduct since its source, bus
20
, is higher than its gate (EN, ground). Charge is conducted from hot bus
20
to the internal Vcc bus through pullup transistor
12
. This may be undesirable.
Modern networking equipment is often reconfigured. Network boards or cards may be added to a backplane bus without powering down the bus and thus shutting down the network. This is known as hot insertion or live insertion.
Hot bus
20
can be a network bus such as a backplane bus in a chassis or equipment rack. Hot bus
20
is powered up and active, having signals in high and low states. These signals may be changing rapidly during the insertion sequence. Under these circumstances, when transistors
10
,
12
are on the board being inserted, the voltage on hot bus
20
may be disturbed causing failures of other powered-up boards. Data on hot bus
20
can be lost since high data rates use only a few microseconds or nanoseconds for each data transfer.
NMOS bus switches are ideal for live-insertion applications, since n-channel transistors do not conduct when their gates are grounded. The drains of n-channel transistors can be directly connected to the hot bus since the p-type substrates are also grounded, preventing the forward-biasing of any p-n junctions. However, the use of a p-channel pullup transistor can cause problems during live insertion.
What is desired is to use a NMOS bus switch for hot-plug or live insertion applications. It is desired to use a NMOS bus switch with a PMOS pullup transistor for biasing the hot bus. It is desired to insert the bus switch with the p-channel pullup into a hot, live bus without disturbing the hot bus.


REFERENCES:
patent: 5543734 (1996-08-01), Volk et al.
patent: 6320408 (2001-11-01), Kwong

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