Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-09-28
2004-01-13
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S093000, C345S211000
Reexamination Certificate
active
06677923
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to liquid crystal drivers for driving a liquid crystal panel (liquid crystal display section) and liquid crystal displays including the driver, in particular to liquid crystal drivers that are small in size and low in power consumption and liquid crystal displays including the driver.
BACKGROUND OF THE INVENTION
Referring to
FIG. 9
, a block diagram is shown depicting a thin film transistor (TFT) liquid crystal display, which is a typical example of active matrix liquid crystal displays.
The liquid crystal display includes a liquid crystal display section and a liquid crystal driver driving the display section. The liquid crystal display section is made based on a TFT liquid crystal panel
901
in which there are provided a liquid crystal display element (not shown) and an opposite electrode (common electrode)
906
.
Meanwhile, the liquid crystal driver is formed by IC-based source drivers
902
, IC-based gate drivers
903
, a controller
904
, and a liquid crystal power supply
905
.
Each of the source drivers
902
and the gate drivers
903
is typically fabricated from an IC (Integrated Circuit) chip placed on a wired film, such as a tape carrier package (TCP). The mounting of the IC chip on a liquid crystal panel is done by connecting the IC chip to the ITO (Indium Tin Oxide) terminals of the liquid crystal panel or by direct thermocompression of the IC chip to the ITO terminals with an intervening anisotropic conductive film (ACF).
In some cases, the controller
904
, liquid crystal power supply
905
, source drivers
902
, and gate drivers
903
are entirely or partly integrated on a single chip to fit in a reduced size of the liquid crystal display.
FIG. 9
shows these components individually according to their functions.
The controller
904
supplies digitized display data (for example, RGB signals corresponding to red, green, and blue) and various control signals to the source drivers
902
and gate drivers
903
. Major control signals supplied to the source drivers
902
include a horizontal synchronizing signal, a start pulse signal, and a source driver clock signal which are indicated as S
1
in the diagram. Major control signals supplied to the gate drivers
903
include a vertical synchronizing signal and a gate driver clock signal which are indicated as S
2
in the diagram. The power source to drive the ICs are omitted in the diagram.
The liquid crystal power supply
905
supplies a liquid crystal panel display voltage (more specifically, in the present invention, a reference voltage from which tone display voltages are produced) to the source drivers
902
and gate drivers
903
.
The controller
904
, receiving the display data from a member not shown in the diagram, transmits the data to the source drivers
902
in the form of a digital signal as the display data D. Each source driver
902
latches the incoming digital display data serially and subsequently converts the latched data from digital to analog based on the incoming horizontal synchronizing signal (alternatively referred to as latch signal Ls as shown in FIG.
13
). The source driver
902
then supplies the D/A converted data, i.e., the analog voltage for tone displays (tone display voltage), from its liquid crystal drive voltage output terminal over a later-detailed source signal line
1004
to an associated liquid crystal display element (not shown) in the liquid crystal panel
901
.
Now, the liquid crystal panel
901
will be described.
FIG. 10
shows the structure of the liquid crystal panel
901
. The liquid crystal panel
901
is provided with pixel electrodes
1001
, pixel capacitors
1002
, TFTs
1003
for turning on/off the application of voltages to the respective pixels, source signal lines
1004
, gate signal lines
1005
, and an opposite electrode
1006
(an equivalent to the opposite electrode
906
in FIG.
9
). In the figure, the region identified as “A” encloses liquid crystal display elements for one pixel.
The source signal lines
1004
are fed from the source drivers
902
with tone display voltages according to the brightness of the pixels required for a display. The gate signal lines
1005
are fed from the gate drivers
903
with scan signals to sequentially turn on the TFTs
1003
row by row. As the scan signal turns on the TFT
1003
, permitting a voltage to be applied through the source signal line
1004
to the pixel electrode
1001
connected to the drain of the TFT
1003
, the pixel capacitor
1002
between the pixel electrode
1001
and the opposite electrode
1006
is charged. This changes the transmittance of the liquid crystal to visible light, effecting a display.
FIGS. 11 and 12
show an example of a liquid crystal drive waveform. In the figures,
1101
and
1201
identify a drive signal output from the source driver
902
;
1102
and
1202
a drive signal output from the gate driver
903
;
1103
and
1203
the potential of the opposite electrode
1006
; and
1104
and
1204
the potential of the pixel electrode
1001
. The voltage across the liquid crystal material is equal to the potential difference between the pixel electrode
1001
and the opposite electrode
1006
, which is shown by slant lines in the figure.
For example, in
FIG. 11
, the TFT
1003
is on when the drive signal output
1102
from the gate driver
903
is high, causing the difference between the drive signal output
1101
from the source driver
902
and the potential
1103
of the opposite electrode
1006
to be applied to the pixel electrode
1001
. The drive signal output
1102
from the gate driver
903
subsequently goes LOW. This turns off the TFT
1003
, but does not change the foregoing voltage applied to the pixel due to the provision of the pixel capacitor
1002
. The same description holds true with the case of FIG.
12
.
FIGS. 11 and 12
show cases of different voltages being applied to the liquid crystal material. A higher voltage is applied in the case of
FIG. 11
than in the case of FIG.
12
. The voltage across the liquid crystal, when varied in an analog manner as above, causes the transmittance of the liquid crystal to light to vary in an analog manner; a tone display is thus produced. The number of displayed tones is determined by the number of analog voltages available for application to the liquid crystal.
The present invention is directed to standard voltage generator circuits and output circuits for use in tone display circuits that are very large in size and very high in power consumption. For these reasons, the following will describe the liquid crystal driver with a focus on the source drivers
902
.
FIG. 13
is a block diagram of the source drivers
902
. Description will be made below about major components only. Digital display data sets DR, DG, DB (for example, 6 bits), as transmitted from the controller
904
, are temporarily latched by an input latch circuit
1301
. The digital display data sets DR, DG, DB correspond to red, green, and blue respectively.
Meanwhile, a start pulse signal SP is shifted through a shift register circuit
1302
in synchronism with the clock signal CK and appears at the last stage of the shift register circuit
1302
, from which the start pulse signal SP (cascade output signal S) is supplied to a next source driver.
The digital display data sets DR, DG, DB latched by the input latch circuit
1301
are temporarily stored serially in the sampling memory circuit
1303
in synchronism with output signals from a number of stages of the shift register circuit
1302
and transmitted to a hold memory circuit
1304
in the next stage.
As display data for one horizontal synchronization period is stored in the sampling memory circuit
1303
, the hold memory circuit
1304
acquires an output signal from the sampling memory circuit
1303
based on the horizontal synchronizing signal (latch signal Ls) to supply to a level shifter circuit
1305
in the next stage and to retain the display data until an input of a succeeding horizontal synchronizing signal.
The level shifter circuit
1305
boo
Kajihara Noriyuki
Ogawa Yoshinori
Birch & Stewart Kolasch & Birch, LLP
Dinh Duc Q
Hjerpe Richard
Sharp Kabushiki Kaisha
LandOfFree
Liquid crystal driver and liquid crystal display... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Liquid crystal driver and liquid crystal display..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Liquid crystal driver and liquid crystal display... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3261700