Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1997-11-19
2001-04-24
Nguyen, Chanh (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S100000
Reexamination Certificate
active
06222518
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal driver which has an internal memory and a liquid crystal display which uses such a driver.
In a liquid crystal display connected to a computer, there is performed an operation in which an image is always displayed on a display screen. The image display operation is performed in such a manner that a liquid crystal driver on the liquid crystal display side successively reads display data from a display memory (or makes a display access) and supplies the read data to a liquid crystal panel at a predetermined period. In the case where there is a command from a computer side for rewriting or change and addition of display data (hereinafter referred to as updating), it is necessary to update data of the display memory (or make an updating access). Since the display data updating operation (or updating access) is not synchronous with the display operation on the liquid crystal display side and is not periodical, there may be the case where an access to the display memory for the display operation and an access to the display memory for the updating of data conflict with each other. In general, the display operation cannot be interrupted and has a preference to the updating operation. Therefore, it is necessary to change the contents of the display memory so that the updating operation does not obstruct the display operation.
The conventional liquid crystal display is constructed using, for example, a liquid crystal driver HD66107T disclosed in
Hitachi LCD Controller/Driver LSI Data Book,
pp. 787-806, published by Hitachi, Ltd. Such a conventional liquid crystal driver will be explained by use of
FIGS. 2
to
5
.
In
FIG. 2
, reference numeral
201
denotes a control signal bus for transferring a control signal, and numeral
202
denotes a data bus for transferring display data. Numerals
203
-
1
and
203
-
2
denote liquid crystal drivers. In the shown example, two liquid crystal drivers are used in conformity with the width of a liquid crystal panel
219
in an X (or horizontal) direction. The liquid crystal drivers
203
-
1
and
203
-
2
will hereinafter be represented generically as “liquid crystal driver
203
”. (Similar representation will be used for other reference numerals.) Numeral
204
denotes a timing control circuit for controlling the operation of the liquid crystal driver
203
, and numeral
205
denotes a shift register for generating a signal which latches display data transferred by the data bus
202
. Numeral
206
denotes a signal line for transferring latch clocks outputted from the shift register
205
, numeral
207
a latch for successively taking in display data, numeral
208
a data bus for transferring data outputted from the latch
207
, numeral
209
a latch for simultaneously taking in data transferred by the data bus
208
, and numeral
210
a data bus for transferring data outputted from the latch
209
. Numeral
211
denotes a level shifter for shifting display data transferred by the data bus
210
into a voltage level corresponding to a liquid crystal applied voltage (or a voltage to be applied to the liquid crystal of a liquid crystal panel). Numeral
212
denotes a data bus for transferring the level-shifted data, and numeral
213
denotes a voltage selector. Numeral
214
denotes an output voltage line for transferring a liquid crystal applied voltage which is selected by the voltage selector
213
in accordance with display data transferred through the data bus
212
. Numeral
215
denotes a CL
2
clock signal for controlling the shift register
205
, and numeral
216
denotes a CL
1
clock signal for taking data into the latch
209
. Numeral
217
denotes a scanning circuit for selecting a line on which display is to be made. Numeral
218
denotes a scanning signal line for transferring a scanning signal generated by the scanning circuit
217
, and numeral
219
denotes the display panel. Numeral
220
denotes a power supply circuit, and numerals
221
and
222
denote driving voltage lines for transferring driving voltages which drive the scanning circuit
217
and the liquid crystal driver
203
, respectively.
FIG. 3
shows a block diagram of an example of a personal computer system using the liquid crystal display shown in FIG.
2
. In the shown example, a display memory
307
is arranged at the exterior of the liquid crystal driver
203
.
In
FIG. 3
, reference numeral
301
denotes a CPU, numeral
302
a main memory, numeral
303
an address bus for transferring an address, numeral
304
a data bus for transferring data, and numeral
305
a control signal bus for transferring a control signal. Numeral
306
denotes a display controller, and numeral
307
denotes the display memory for storing display data therein. Numeral
308
denotes a timing control circuit, and numeral
309
denotes a timing signal which includes a signal for accessing the display memory
307
and a signal for operating the liquid crystal driver
208
. Numeral
310
denotes a selection signal for making a change-over between a display address (or address for display) and an updating address (or address for updating). Numeral
311
denotes a controller for generating a timing signal to be transferred to a signal bus
312
and an address to be transferred to a display address bus
313
. Numeral
314
denotes a selector for selecting a display address and an updating address, numeral
315
an address bus for transferring an address selected by the selector
314
for accessing the display memory
307
, and numeral
316
a data buffer. Numeral
317
denotes a data bus for transferring data for accessing the display memory
307
, and numeral
318
denotes a data bus for transferring display data for the liquid crystal display.
FIG. 4
is a timing chart showing an access to the display memory
307
in the system shown in FIG.
3
.
FIG. 5
is a timing chart showing the operation of the liquid crystal driver
203
.
The liquid crystal display using the conventional liquid crystal driver will be explained using
FIG. 2
again.
A control signal transferred through the signal bus
201
is inputted to the timing control circuit
204
. A generated CL
2
clock signal
215
is transferred to the shift register
205
which in turn generates a latch clock. The generated latch clock signal is outputted to the signal line
206
. On the other hand, display data transferred through the data bus
202
to the driver
203
is successively latched by the latch
207
in accordance with the latch clock signal transferred through the signal line
206
. The display data latched by the latch
207
is simultaneously stored into the latch
209
through the data bus
208
in accordance with a CL
1
clock signal
216
. This operation is shown in FIG.
5
. Also, display data outputted from the latch
209
by the CL
1
clock signal is inputted through the data bus
210
to the level shifter
211
for conversion thereof into a voltage level corresponding to a liquid crystal applied voltage. The level-shifted display data is transferred through the data bus
212
to the voltage selector
213
which in turn selects a liquid crystal applied voltage. The selected liquid crystal applied voltage is supplied through the output voltage line
214
to the liquid crystal panel
219
.
Thus, the conventional liquid crystal driver has only a function of latching display data and outputting it after conversion into a liquid crystal applied voltage. This point will be explained in detail by use of
FIG. 3
in conjunction with the system using the liquid crystal display driven by the conventional liquid crystal driver
203
.
In the conventional system, it is necessary to transfer display data to the liquid crystal display at a fixed period. Therefore, the system requires the display memory
307
for storing display data for one screen, means for reading display data from the display memory
307
to output the read display data to the liquid crystal display, and means for updating display data to be stored in the display memory
307
. Since on
Furuhashi Tsutomu
Ikeda Makiko
Inuzuka Tatsuhiro
Kasai Naruhiko
Nitta Hiroyuki
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Nguyen Chanh
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