Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2011-08-02
2011-08-02
Nguyen, Chanh (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
Reexamination Certificate
active
07990354
ABSTRACT:
An exemplary LCD (200) includes gate lines (23), data lines (24); a gradation voltage adjusting circuit (26) for receiving the gradation voltages respectively corresponding to the j, j+1, k, and k+1 frames interchanging the j+1 frame gradation voltage and the k frame gradation voltage when a first voltage difference between j frame gradation voltage and j+1 frame gradation voltage is less than a second voltage difference between j frame gradation voltage and k frame gradation voltage; a memory circuit (28) for storing the gradation voltages corresponding to the frames1, 2, . . . j, j+2, . . . k−1, k+1 . . . h and storing the interchanged gradation voltages corresponding to the frames j+1 and k; and a gate driver (21) for receiving the gradation voltages stored in the memory circuit. A smallest rectangular area formed by any two adjacent gate lines together with any two adjacent data lines defines a pixel unit thereat.
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patent: 2004/0196274 (2004-10-01), Song et al.
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Chang Chih-Sheng
Chen Chueh-Ju
Chimei Corporation
Chung Wei Te
Kirkpatrick John
Nguyen Chanh
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