Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material
Patent
1997-06-30
2000-08-15
Abraham, Fetsum
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Amorphous semiconductor material
257 57, 257 72, 257 61, 257 65, 257 66, 257288, 257347, 257351, 257368, 257392, 257393, H01L 2978
Patent
active
061040401
ABSTRACT:
A semiconductor element suitable for use in the display region of a liquid crystal display or for use in the drive circuit region for driving the display region is comprised of first, second, third and fourth electrodes; a pair of first conducting type semiconductor layers separated from each other and connected to the second and the third electrodes, respectively; an intrinsic semiconductor layer connected to the pair of the first conductivity type semiconductor layers; and a second conductivity type semiconductor layer formed on the intrinsic semiconductor layer, wherein an insulating film is interposed between the first electrode and the intrinsic semiconductor layer, and the fourth electrode is formed on the second conductivity type semiconductor layer formed on the intrinsic semiconductor layer.
REFERENCES:
patent: 5196911 (1993-03-01), Wu
1985 Int'l Display Research Conference "Active Matrix Addressed Liquid-Crystal Displays", S. Morozumi et al., 1985 IEEE, pp. 9-13.
"A Dynamic Threshold Voltage MOSFET(DTMOS) for Ultra-Low Voltage Operation", F. Assaderaghi et al., 1994 IEEE, pp. IEDM-94 809-812.
"Design Parameter Dependence and Optimization of Drain Characteristics of DTMOS", S. Komatsu et al., Technical Report of IEICE, VLD 96-43, ED96-89, SDM96-99 (1996-09), pp. 17-22.
"High Current Gain Hybrid Lateral Bipolar Operation of DMOS Transistors", Olsson et al., IEEE Transactions on Electron Devices, vol. 42, No. 9, Sep. 1995, pp. 1628-1635.
"A 0.5 V MTCMOS/SIMOX Circuit with 200 ps Logic Gate", T. Douseki et al., Technical Report of IEICE. SDM96-55-ICD96-75 (1996-07), pp. 41-46.
"Low Voltage/Low Power SOI-DRAM with Multiple Body Control Circuits", Amano et al., Technical Report of IEICE., SDM96-54, ICE96-74 (1996-07), pp. 33-39.
"Design of 0.5V CMOS Logic Using SOI Technology", Fuse et al., Technical Report of IEICE, ED96-65, SDM96-48, ICD96-68(1996-06), pp. 73-80.
Kawachi Genshiro
Mikami Yoshiro
Abraham Fetsum
Hitachi , Ltd.
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