Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
2000-10-17
2003-04-22
Dudek, James (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C257S059000, C257S072000, C257S347000
Reexamination Certificate
active
06552757
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a liquid crystal display element and the method for manufacturing the same, and especially, to the structure of a liquid crystal display element providing improved display quality, reduced manufacturing cost and higher reliability when applied to a high definition large-sized display.
DESCRIPTION OF THE RELATED ART
Along with the development of information technology, needs for laptop computers, portable data terminals, car navigation systems and the like have rapidly increased, accompanied by the active research and development of liquid crystal display devices. Liquid crystal display elements used in a liquid crystal display device forms a display pattern on the screen by selectively driving each pixel electrode arranged in matrix in the display device. When voltage is applied to the selected pixel electrode and an opposing electrode, the display medium mounted between these electrodes, such as the liquid crystal, is optically modulated, and recognized as a display pattern. One method for driving the pixel electrodes is the active matrix driving method, wherein independent pixel electrodes are aligned in the display, and each independent pixel electrode is connected to a switching element and driven by the same. Generally known as examples for the switching element used for selectively driving the pixel electrodes are the thin film transistor (hereinafter called TFT) and the MIM (metal-first insulation film-metal).
Resent trend of liquid crystal display panels is the large-sized high-definition panel, and active research is performed in this field. However, along with the increase in size of the panel or the glass substrate, it became increasingly difficult to provide a panel having homogeneous (even) display.
One cause of this problem is the superposition mismatch of the patterns, which results from performing plural numbers of photolithography when manufacturing the liquid crystal display element. When patterns are superposed during the repeated photolithography steps, there is generated within the substrate surface a region where the superposed areas L·W of the gate electrode and the drain electrode differ ((L+&Dgr;x
1
)·W, (L+&Dgr;x
2
)·W, . . . ). When this occurs, the parasitic capacity proportional to that area ((L+&Dgr;x
1
)·W, (L+&Dgr;x
2
)·W, . . . ), that is, the parasitic capacity (Cgd) between the gate electrode and the drain electrode, is also dispersed within the substrate plane.
The degree of dispersion becomes conspicuous as the size of the glass substrate and the panel increases. This is mainly because (1) the accuracy of the exposure equipment used during the photolithography method is deteriorated as the size of the glass substrate and the panel increases; and (2) the influence of deflection of the glass panel starts to appear as the size of the glass substrate increases.
On the other hand, in the example of an active matrix liquid crystal display including TFT elements as its component, after a certain TFT element is selected and charged to a predetermined signal potential, and simultaneously when the gate is closed, the pixel potential is fluctuated for &Dgr;V. This is caused by the capacity coupling of the parasitic capacity (Cgd) between the gate electrode-drain electrode of the TFT element, the liquid crystal capacity (Clc) and the subsidiary capacity (Ccs). The size of &Dgr;V is computed by the following formula (1).
&Dgr;
V=&Dgr;Vg·Cgd/
(
Cgd+Clc+Ccs
) (1)
&Dgr;Vg: variation quantity of gate voltage
Cgd: parasitic capacity between gate electrode-drain electrode
Ccs: subsidiary capacity
When the value of Cgd in formula (1) is dispersed within the same panel plane, it means that &Dgr;V is dispersed, which leads to dispersion of the pixel potentials. As a result, problems such as display unevenness or flickering of the panel are caused.
Prior art examples 1 and 2 are used to explain the above-mentioned problems. First, the liquid crystal display element according to prior art example 1 comprises, as shown in FIG.
7
(
a
) showing the explanatory plan view of a unit pixel and FIG.
7
(
b
) showing the explanatory cross-sectional view taken at line A-A′ of FIG.
7
(
a
), a liquid crystal layer (not shown), and a pair of transparent insulating substrates
21
facing each other with the liquid crystal layer positioned in between. Mounted on one of said pair of transparent insulating substrates
21
are a gate signal wire
22
a
; a source signal wire
29
a
formed orthogonal to the gate signal wire
22
a
; a laminated semiconductor layer formed near the crossing point of the gate signal wire
22
a
and the source signal wire
29
a
and including a gate electrode
22
b
, a gate insulation film
25
, a semiconductor layer (a-Si layer)
26
a
, a semiconductor junction layer (n+-Si layer)
28
, a channel protection film
27
, a source electrode
29
b
, and a drain electrode
29
c
; and a pixel electrode
30
electrically connected to the laminated semiconductor layer. The channel protection film
27
has a side surface
273
positioned substantially perpendicular to the film surface, for example.
The method for manufacturing the prior art example 1 will now be explained with reference to
FIGS. 8 and 9
. Sputtering method is used to form a film made of Al, Mo, Ta or the like on a transparent insulating substrate
21
. Then, through photolithography, a gate wire (not shown), a gate electrode
22
b
and a subsidiary capacity wire
23
are formed (refer to
FIG. 8
a
).
Next, an anodic oxidation film
24
is formed through anodic oxidation. Subsequently, three layers each formed of a gate insulation film (SiNx)
25
, an a-Si material
26
, and a channel protection film
27
are continuously formed through CVD method. Then, a positive-type resist film is applied, the whole surface of which being exposed from the back surface of the transparent insulating substrate
21
using the gate electrode
22
b
as mask. The positive-type resist film pattern formed by developing the exposed film is used as a mask for etching the channel protection film
27
having an island-shaped pattern (refer to
FIG. 8
b
).
Next, an n+-Si layer
28
is formed, to which is provided photolithography in order to form a contact layer that contacts the source electrode
29
b
and the drain electrode
29
c
. At this time, the lower layer formed of a-Si material
26
is patterned into an island-shape simultaneously when the n+-Si layer
28
is etched, and becomes the a-Si layer
26
a
(refer to
FIG. 8
c
).
Next, a metal layer (source/drain metal) is formed using Mo, Ta and the like, which is then patterned into the desired shape through photolithography, forming a source signal wire
29
a
, a source electrode
29
b
and a drain electrode
29
c
(refer to
FIG. 9
d
).
The TFT portion constituting the switching element of each individual pixel is formed according to the method explained above. Next, a transparent conductive film is formed using ITO and the like, which is then patterned to the desired shape through photolithography, forming a pixel electrode
30
(refer to
FIG. 9
e
).
Next, a passivation film
31
formed of SiNx and the like is formed through CVD method, which is then patterned into the desired shape (refer to
FIG. 9
f
).
According to the manufacturing method of prior art example 1, if the pattern of the source/drain electrode is displaced on the substrate surface, the overlapping area of the gate electrode
22
b
and the drain electrode
29
c
on the substrate or panel plane is changed. In other words, when in one area of the substrate, the overlapping area of the gate electrode
22
b
and the drain electrode
29
c
is L·W
1
as shown in FIG.
10
(
a
) and (
b
), while in another area, the overlapping area is (L+&Dgr;x)·W
2
as shown in FIG.
11
(
a
) and (
b
) (W
1
≈W
2
≈W), than the parasitic capacity (Cgd) will increase in proportion to this increase in the overlapping area (&Dgr;x·W). As a result, the pixel potentials in the substrate or pa
Hara Takeshi
Murai Atsuhito
Ogata Hidetake
Akkapeddi P. R.
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
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