Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2006-11-28
2006-11-28
Shalwala, Bipin (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S087000, C345S089000
Reexamination Certificate
active
07142187
ABSTRACT:
An LCD driving scaler capable of reducing electromagnetic interference employs a spread spectrum phase locked loop (PLL) in which a multi-phase voltage controlled oscillator oscillates and outputs a scaler pixel clock signal and a plurality of oscillation signals of different phases. A spread spectrum processor counts clock periods of a reference pixel clock signal when a horizontal synchronization signal having an adjusted frame rate is activated, and sequentially outputs the plurality of oscillation signals in response to a decoding signal. The plurality of oscillation signals are output to a main divider, which generates the main divider signal by dividing the frequencies of the plurality of oscillation signals. A main divider signal is input into a phase frequency detector, which detects a phase difference between the predivider signal and the main divider signal and outputs the phase difference signal so that the frequency of the scaler pixel clock signal repeatedly varies.
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Kim Ho-young
Kim Yong-sub
Dharia Prabodh
Shalwala Bipin
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