Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only
Reexamination Certificate
1999-04-19
2003-09-23
Ton, Toan (Department: 2871)
Liquid crystal cells, elements and systems
Particular structure
Having significant detail of cell structure only
C349S123000, C349S043000
Reexamination Certificate
active
06624864
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display devices, a matrix array substrate used for flat panel display devices and so on, and a method for manufacturing the matrix array substrate.
2. Related Background Art
Recently, flat panel display devices, which could replace CRT (Cathord Ray Tube) display devices, have been developed vigorously. Among the flat panel display devices, liquid crystal display (LCD) devices are lighter in weight and thinner, and consume lower power than the other flat panel display devices. Because of this, the liquid crystal display devices are especially getting a lot of attention.
Hereinafter, active matrix type of LCD devices, of which switching elements are arranged for each display pixel, will be explained. The active matrix type of LCD devices has a structure in which a liquid crystal layer is held between an array substrate and an opposed substrate, via alignment films. The array substrate comprises signal lines and scanning lines arranged in matrix form on a transparent insulating substrate such as glass and quartz, and switching elements such as TFTs (Thin Film Transistors) arranged in the vicinity of cross points of the signal lines and the scanning lines. An active layer of each TFT is formed of a semiconductor thin film such as amorphous silicon (a-Si:H).
Gate electrodes of the TFTs are connected to the scanning lines, drain electrodes of the TFTs are connected to the signal lines, and source electrodes of the TFTs are connected to display pixel electrodes made of, for instance, an ITO (Indium Tin Oxide) film.
The opposed substrate has an opposed electrode made of the ITO film formed on the transparent insulating substrate. In order to realize color display image, for instance, a color filter layer is provided between the opposed electrode of the opposed substrate and the insulating substrate.
FIG. 13
is a cross sectional view of a matrix array substrate used in the conventional LCDs, and
FIG. 14
a
-
14
d
and
FIG. 15
a
-
15
c
are diagrams illustrating manufacturing steps of a conventional array substrate. Each of FIG.
14
and
FIG. 15
shows cross sectional view of TFT regions on the array substrate and scanning line pad regions. On the basis of these diagrams, the steps for manufacturing the conventional array substrates will be explained.
Fist of all, as shown in
FIG. 14
a
, gate electrodes
2
and scanning lines
3
are formed on the glass substrate
1
. Scanning pad regions are provided at the end of the scanning lines
3
and each of the scanning lines
3
is connected to the respective gate electrode
2
. Next, as shown in
FIG. 14
b
, a gate insulated film
4
is formed on the substrate
1
, and then a semiconductor layer
5
made of a-Si:H is formed thereon. Next, an insulated film
6
for an etching stopper layer is formed on the semiconductor layer
5
, and then the insulated film
6
is patterned.
Next, as shown in
FIG. 14
c
, after a lower resistance semiconductor layer
7
made of n
+
a-Si:H is formed thereon, the semiconductor layer
5
and the low resistance semiconductor layer
7
are patterned. Next, as shown in
FIG. 14
d
, display pixel electrodes
8
are formed.
Next, as shown in
FIG. 15
a
, contact holes
9
are formed through the gate insulated film
4
on the pad regions of the scanning lines
3
. Next, as shown in
FIG. 15
b
, source electrodes
10
and drain electrodes
11
are formed. Next, as shown in
FIG. 15
c
, the upper surface of the substrate is covered with a passivation film except for the display pixel electrodes on the substrate and the pad regions.
In the conventional manufacturing steps shown in FIG.
14
and
FIG. 15
, exposure processes, development processes and patterning processes should be carried out at least seven times. As a result, it takes a long time to manufacture the LCD devices. Furthermore, because the photo-resist and the constituent materials are used in high volume, manufacturing costs become high.
By the way, Japanese Patent Laid-Open Pub. No.190571/1993 discloses manufacturing steps in which the number of patterning is reduced by using TFTs having an etching stopper layer, which thereinafter is called a channel protective TFT type. Furthermore, Japanese Patent Laid-Open Pub. No.161764/1986 discloses manufacturing steps in which the number of patterning is reduced by using the TFT (back channel cut type TFT) which has no etching stopper layer.
However, the above mentioned documents disclose only the TFT portions, and disclose no specific method for reducing all the manufacturing steps.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a liquid crystal display devices, a matrix array substrate and a method for manufacturing the matrix array substrate in which it is possible to simplify a manufacturing steps by reducing the number of masks and to maintain a high productivity without lowering a yield ratio.
In order to achieve the foregoing object, a liquid crystal display device comprising:
a matrix array substrate having scanning lines including gate electrode portions arranged on an insulating substrate, a semiconductor film arranged on said gate electrode portions of said scanning lines via an insulated film, signal lines electrically connected to said semiconductor film via drain electrodes, source electrodes electrically connected to said semiconductor film, and display pixel electrodes electrically connected to said source electrodes;
an opposed substrate arranged so as to be opposite to said matrix array substrate, and
a liquid crystal layer held between said matrix array substrate and said opposed substrate via respective alignment films,
wherein said alignment film on the matrix array substrate directly contacts at least said display pixel electrodes and said signal lines of said matrix array substrate.
Furthermore, a matrix array substrate comprising:
scanning lines including gate electrode portions arranged on an insulating substrate;
a semiconductor film arranged on said gate electrode portions of said scanning lines via an insulated film;
signal lines electrically connected to said semiconductor film via drain electrodes;
source electrodes electrically connected to said semiconductor film, and
display pixel electrodes electrically connected to said source electrodes,
wherein said signal lines includes a first signal line layer mainly made of aluminum and a second line layer which is deposited on the first signal line layer and made of at least one material among tantalum (Ta), titanium (Ti), tungsten (W) and vanadium (V).
Furthermore, a method for manufacturing a matrix array substrate comprising scanning lines arranged on a substrate, thin film transistors each having an insulated film arranged on said scanning lines, a semiconductor film arranged on said insulated film, and source electrodes and drain electrodes electrically connected to said semiconductor film, signal lines electrically connected to the respective drain electrode, and display pixel electrodes electrically connected to the respective source electrode, comprising:
a first step of depositing on said insulated film an unprocessed semiconductor film and an unprocessed channel protective film in this order;
a second step of forming a channel protective film by patterning said unprocessed channel protective film;
a third step of forming openings, each of said openings corresponding to each of pads for connecting said scanning lines with external circuits, and each of said openings being formed through said unprocessed semiconductor film and said insulated film;
a fourth step of depositing a first conductive layer on the substrate, and patterning said first conductive layer and said unprocessed semiconductor layer by using a common mask pattern, in order to form a lower conductive layer of said source electrodes, drain electrodes, and signal lines at a time as well as to form said semiconductor film, and
a fifth step of forming a second conductive layer on the substrate, and patterning said second conductive
Dojo Masayuki
Kamimura Takaaki
Kubo Akira
Machida Masahiko
Miyaji Tomoki
Kabushiki Kaisha Toshiba
Pillsbury & Winthrop LLP
Ton Toan
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