Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-02-07
2003-07-08
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S096000, C349S139000
Reexamination Certificate
active
06590550
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display device, and in particular to an active matrix type liquid crystal display device.
Among the active matrix type liquid crystal display devices, a so-called in-plane switching type (or a so-called horizontal electric field type) liquid crystal display device, for example, has a pair of opposing transparent substrates, a liquid crystal layer sandwiched between the substrates, and a plurality of pixel areas formed on a surface of one of the substrates on a liquid crystal layer side thereof each having a pixel electrode and a counter electrode configured so as to generate therebetween electric fields having components parallel with the major surfaces of the substrates.
While the counter electrode is supplied with a voltage signal serving as a reference voltage, the pixel electrode is supplied with a video signal from a drain signal line via a thin film transistor driven by a scanning signal from a gate signal line.
In each pixel area, a holding capacitance Cstg is formed between the counter electrode and the pixel electrode such that the video signal is stored in the pixel electrode after the thin film transistor is turned OFF.
For example, each pixel area is disposed in an area surrounded by two adjacent ones of a plurality of gate signal lines (or a plurality of counter-voltage signal lines) each extending in the x-axis direction and arranged in the y-axis direction in a system of rectangular co-ordinates and two adjacent ones of a plurality of drain signal lines each extending in the y-axis direction and arranged in the x-axis direction.
In the liquid crystal display device having such a configuration, however, when writing of a signal into a pixel electrode is completed via a thin film transistor, a potential of a source side of the thin film transistor connected to the pixel electrode is shifted toward a lower potential due to a capacitive coupling by a capacitance Cgs between the source and a gate of the thin film transistor. Noise which causes such an unwanted shift of a potential or a voltage will be hereinafter referred to as a disturbance voltage.
A potential of the counter electrode is also shifted toward a lower potential due to a capacitive coupling by a capacitance Cgc between a gate signal line connected to the gate of the thin film transistor and the counter electrode (or a counter-voltage signal line), and therefore, if a delay time constant of the counter-voltage signal is large, the potential of the counter electrode is shifted toward a lower potential and varies the potential of the source via the holding capacitance Cstg.
If a distortion occurs in a scanning signal (pulse) due to a delay caused by resistance, capacitance and the like of the gate signal line, the thin film transistor is brought into a half-ON state when selection of the gate is completed, therefore a disturbance voltage is superimposed upon a useful signal, as a result, an apparent magnitude of the disturbance voltage is made smaller and the potential of the source side of the thin film transistor is shifted toward a higher potential after the writing of the signal is completed.
Therefore the amount of a shift of the potential varies according to the amount of the delay by the gate signal lines, and consequently, the brightness of the display area becomes non-uniform (graded).
The optimum potential of the counter electrode varies with position in the display area and this variation causes flicker, image retention and the like.
Further, the potential of the counter electrode is shifted toward a lower potential according to the amount of the delay caused by resistance, capacitance and the like of the counter-voltage signal line when selection of the gate is completed, as a result the potential of the source side of the thin film transistor becomes instable and this instability causes a graded brightness distribution, flicker, smears, image retention, and the like.
SUMMARY OF THE INVENTION
This invention was made based upon the above situation, and it is an object of the present invention to provide a liquid crystal display device having stabilized pixel electrode potentials irrespective of the amount of signal delays in the gate signal lines and the like.
The following explains representative ones of the inventions disclosed in this specification briefly.
In accordance with an embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixels each having a switching element and disposed in an area surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, each of the plurality of pixels being configured such that video information supplied from a corresponding one of the plurality of drain signal lines is written thereinto via the switching element driven by a first scanning signal from a corresponding one of the plurality of gate signal lines, wherein a second scanning signal from one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines rises approximately simultaneously with fall of the first scanning signal such that disturbances introduced into one of the plurality of pixels by the first scanning signal and the second scanning signal cancel each other.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing substrates; a liquid crystal layer sandwiched between the pair of opposing substrates; a plurality of gate signal lines disposed on a liquid crystal layer side surface of one of the pair of opposing substrates; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween; and a plurality of pixel areas each having a pixel electrode and a switching element, and surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, wherein a capacitance formed between the pixel electrode and the corresponding one of the plurality of gate signal lines is approximately equal to a capacitance formed between the pixel electrode and one of the plurality of gate signal lines succeeding the corresponding one of the plurality of gate signal lines.
In accordance with another embodiment of the present invention, there is provided a liquid crystal display device comprising: a pair of opposing first and second substrates; a liquid crystal layer sandwiched between the pair of opposing first and second substrates; a plurality of gate signal lines disposed on a surface of the first substrate on a liquid crystal layer side thereof; a plurality of drain signal lines disposed to intersect the plurality of gate signal lines with an insulating layer interposed therebetween on the surface of the first substrate; and a plurality of pixel areas each having a pixel electrode and a switching element, and arranged in a matrix fashion surrounded by two adjacent ones of the plurality of gate signal lines and two adjacent ones of the plurality of drain signal lines, the pixel electrode being supplied with a video signal from a corresponding one of the plurality of drain signal lines via the switching element driven by a scanning signal supplied from a corresponding one of the plurality of gate signal lines, wherein a follo
Ashizawa Keiichirou
Ishii Masahiro
Nakayama Takanori
Oota Masuyuki
Eisen Alexander
Hjerpe Richard
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