Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
1997-12-08
2001-11-27
Sikes, William L. (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S038000, C349S043000, C349S111000
Reexamination Certificate
active
06323918
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a liquid crystal display device having the structure of a multigate thin film transistor (TFT) and a process for the production thereof.
2. Description of the Prior Art
The liquid crystal display device of the active matrix type precludes the cross talk by providing the pixels existent therein severally with a switch capable of assuming an OFF state during a nonselective phase and blocking a signal and exhibits a fine display property as compared with the liquid crystal display device of the simple matrix method. Particularly, the liquid crystal display device using a TFT as a switch (hereinafter referred to as “TFT”) acquires an exceptionally fine display property because the TFT possesses a high drive capacity.
Generally, the liquid crystal display device has the structure of enclosing a liquid crystal in a gap between two substrates. A counter electrode, a color filter, an alignment layer, etc. are formed on one of the mutually opposed faces of these two substrates (opposed faces) and an active matrix circuit, a pixel electrode, an alignment layer, etc. are formed on the other of the opposed faces. Polarizers are attached fast one each to the faces of the substrates opposite to the opposed faces mentioned above. These two polarizers are disposed, for example, in such a manner that the directions of polarization of the polarizers perpendicularly intersect each other. In this layout, they assume the normally white mode, i.e. the mode in which they pass light while not exposed to an electric field and they block light while exposed to an electric field. Conversely, when the directions of polarization of the two polarizers are parallel to each other, they assume the normally black mode. Hereinafter, the substrate having the TFT formed thereon will be referred to as “TFT substrate” and the substrate having the counter electrode formed thereon as “counter substrate.”
FIG. 1
is a schematic diagram illustrating the conventional liquid crystal display device. A plurality of gate bus lines
54
and a plurality of drain bus lines
56
are formed on one of the opposed substrates of the liquid crystal display device such that they perpendicularly cross each other as illustrated in
FIG. 1. A
TFT
51
and a pixel electrode
50
are disposed in each of a plurality of rectangular areas which are defined by the gate bus lines
54
and the drain bus lines
56
. The gates of the TFT
51
are connected to the gate bus lines
54
, the drains thereof to the drain bus lines
56
, and the sources thereof to the pixel electrodes
50
.
FIG. 2
is a diagram illustrating the waveform of a voltage applied to the gate bus lines
54
and the drain bus lines
56
. To the gate bus lines
54
is supplied such a signal as turns ON and OFF the pixels at a refreshing timing. In the case of the VGA (video graphics array) display (640×480 dots) of a personal computer, for example, the TFT
51
of a given pixel therein is turned ON and OFF at such a timing that the OFF state of a duration of about 16 m.seconds and the ON state of a duration of 30 &mgr;.seconds are alternately repeated.
The display of an image is attained while the TFT
51
is held in the ON state because the voltage applied to the drain bus lines
56
accumulates an electric charge in the pixel electrode
50
and the electric field generated from the pixel electrode
50
varies the inclination of liquid crystal molecules and induces a proportionate variation in the luminous energy which passes the pixels. The ON-OFF state of the TFT
51
is decided by the current-voltage characteristic (I-V characteristic).
FIG. 3
is a diagram illustrating one example of the IV-V characteristic of the TFT of a liquid crystal display device, with the horizontal axis as the scale of the gate voltage, Vg, and the vertical axis as the scale of the amount of current, Id, flowing between the drain and the source. In the diagram, the area indicated by the symbol a represents the ON state assumed by the TFT and the area by the symbol b the OFF state assumed thereby. As shown in
FIG. 3
, even while the TFT is held in the OFF state, the electric charge accumulated in the pixel electrode leaks and the voltage of the pixel electrode declines because a current (off current) of the order of several pA—some tens of pA flows through the TFT. This amount of decline, &Dgr;V, of the voltage assumes the relation represented by the following formula (1)
&Dgr;V=I
off·
&Dgr;T/C
(1)
wherein &Dgr;V represents the amount of decline of voltage, Ioff the off current of the TFT,&Dgr;T the duration of the OFF state of the TFT (16 m.seconds in the case mentioned above), and C the magnitude of the capacitive component between the pixel electrode and the counter electrode.
When the amount of decline, &Dgr;V, of voltage is large, the screen generates uneven display in the vertical direction and cross talk and degrades the quality of display. Various methods for diminishing the magnitude of &Dgr;V, therefore, have been proposed.
For example, a liquid crystal display device which has a capacitor C
12
connected parallelly to a capacitive component C
11
composed of a pixel electrode and a counter electrode as shown in FIG.
4
and which is designated as “additive capacitance method” or “cumulative capacitance method” has been proposed. This device is incapable of attaining the effect of diminishing the leak of electric charge unless the capacitor C
12
is endowed with a large capacity. An addition to the capacity of the capacitor C
12
has a necessary consequence of diminishing the open area ratio. Particularly when the liquid crystal display device is small and has a minute pitch for the pixels thereof, the enlargement of the capacity of the added capacitor is infeasible because it entails a marked decrease in the open area ratio.
Another liquid crystal display device of the so-called multigate TFT structure which diminishes the OFF current by having a plurality of TFT's connected in series between a train bus line and a pixel electrode has been proposed.
FIG. 5
is a top view illustrating the liquid crystal display device of the conventional multigate TFT structure.
On a glass plate (not shown), a plurality of gate bus lines
64
and a plurality of drain bus lines
66
are disposed so as to intersect perpendicularly as viewed from above. Pixel electrodes
60
made of ITO (indium tin oxide) are formed one each in the rectangular areas defined by the gate bus lines
64
and the drain bus lines
66
. A black matrix
68
(indicated with slanted lines in the diagram) made of a metal film impervious to light is formed between the pixels, namely on the gate bus lines
64
and the drain bus lines
66
.
Polysilicon films
62
are selectively formed on the glass sheet. The polysilicon films
62
and the gate bus lines
64
that overlie and intersect them jointly form two TFT's
61
a
and
61
b
per pixel. These TFT's
61
a
and
61
b
are connected in series between the pixel electrode
60
and the relevant drain bus lines
66
.
This liquid crystal display device has an extremely small OFF current because the two TFT's
61
a
and
61
b
are connected in series between the pixel electrode
60
and the drain bus lines
66
as described above.
Yet another liquid crystal display device which has pixels each provided with a plurality of TFT's and has an additive capacitor connected to the source-drain of each of the TFT's has been proposed as a version having the OFF current of a TFT further allayed as compared with the liquid crystal display device illustrated in
FIG. 5
(JP-A-05-88644, M. Itoh et al. High-Resolution Low-Temperature PolySi TFT-LCD's Using a Novel Structure with TFT Capacitors, SID International Symposium Digest of Technical Papers, p. 17-p. 20, 1996).
FIG. 6
is a top view illustrating the liquid crystal display device just mentioned and
FIG. 7
is a circuit diagram of this device. This liquid crystal display device has a plurality of gate bus lines
Haraguchi Munehiro
Itokazu Masafumi
Morita Keizo
Murakami Hiroshi
Nakazawa Mitsuharu
Duong Tai V.
Fujitsu Limited
Greer, Burns & Crain,Ltd.
Sikes William L.
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