Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only
Reexamination Certificate
2000-11-15
2004-04-06
Chowdhury, T. (Department: 2871)
Liquid crystal cells, elements and systems
Particular structure
Having significant detail of cell structure only
C349S043000, C349S079000
Reexamination Certificate
active
06717638
ABSTRACT:
CROSS REFERENCE
This application claims the benefit of Korean Patent Application No. 1999-50512, filed on Nov. 15, 1999, under 35 U.S.C. § 119, the entirety of which is hereby incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display (LCD) device and a method of manufacturing the same.
2. Description of Related Art
Of the liquid crystal display devices, an active matrix liquid crystal display (AM-LCD) device, in which the thin film transistors and the pixel electrodes are arranged in the form of a matrix, has lately received special attention due to its high resolution and high performance in displaying moving images.
FIG. 1
is a cross sectional view illustrating a typical LCD device. As shown in
FIG. 1
, the LCD device includes lower and upper substrates
2
and
4
with a liquid crystal layer
10
interposed therebetween. The lower substrate
2
has a thin film transistor “S” (TFT) as a switching element and a pixel electrode
14
, while the upper substrate
4
has a color filter
8
and a common electrode
12
. The pixel electrode
14
is formed over a pixel region “P” and serves to apply a voltage to the liquid crystal layer
10
along with the common electrode
12
, and the color filter
8
serves to implement natural colors. A sealant
6
seals an edge of the lower and upper substrate
2
and
4
to prevent leakage of the liquid crystal layer
10
.
In order to manufacture the LCD device described above, the upper and lower substrates
4
and
2
are manufactured by a different process, respectively, and are aligned and assembled to each other. However, such a manufacturing process is very complex.
In order to simplify such a manufacturing process, a structure having a color filter formed on the TFT array substrate, hereinafter referred to as simply “a color filter on TFT (COT) structure” has been introduced.
FIGS. 2A
to
2
D are cross sectional views illustrating a process of manufacturing a conventional LCD device having the COT structure. First, as shown in
FIG. 2A
, a gate electrode
50
is formed on the substrate
1
. A gate insulating layer
52
is formed over the whole substrate
1
while covering the gate electrode
50
. A semiconductor layer
54
is formed on the gate insulating layer
52
. The source and drain electrodes
56
and
58
are spaced apart from each other and overlap both end portions of the semiconductor layer
54
, respectively. A passivation film
60
is formed over the whole substrate
1
while covering the source and drain electrodes
56
and
58
and the semiconductor layer
54
. The semiconductor layer
54
includes an amorphous silicon layer and
7
a
doped semiconductor layer. A portion of the doped semiconductor layer between the source and drain electrodes is etched to form a channel region.
Then, the color filter including the color filter layers
62
a
and
62
b
of red (R), green (G) and blue (B) are formed over the whole substrate
1
. In order to form the three color filter layers of R, G and B, the steps of depositing and patterning a color resin are repeated three times. At this point, a portion of the color filter layer
62
a
on the channel region “ch” and a portion of the color filter layer
62
b
over the drain electrode
58
are etched to be exposed. The reason is to form a light shielding layer and a drain contact hole in a subsequent process.
Subsequently, as shown in
FIG. 2C
, a light shielding layer
70
is formed to cover the channel region “ch”, and a planarization layer
64
is formed over the whole substrate
1
while covering the light shielding layer
70
. The light shielding layer
70
serves to shield the channel region “ch” from light and thus is made of an opaque material. Then, portions of the passivation film
60
and the planarization layer
64
are etched to form the drain electrode contact hole
66
on a portion of the drain electrode
58
.
Finally, as shown in
FIG. 2D
, a pixel electrode
68
is formed on the planarization layer
64
. The pixel electrode
68
is electrically connected with the drain electrode
58
through the drain electrode contact hole
66
.
The method of manufacturing the lower array substrate using the COT technique described above has a high manufacturing yield compared to the method wherein the TFT and the color filter are respectively formed on the different substrates because the pixel electrode and the color filter are easily aligned.
A large-sized LCD device having a high resolution has been recently in great demand. The manufacturing process of a large-sized LCD device has become very complicated, leading to many problems. For example, referring to
FIG. 1
, in a large-sized LCD device, the upper substrate
4
including the color filter
8
and the lower substrate
2
including the TFTs are manufactured by a different manufacturing process, so that a coefficient of thermal expansion of the two substrates
2
and
4
become different. Thus, an alignment margin between the two substrates
4
and
2
should be considered. In other words, an alignment margin between the lower and upper substrates
2
and
4
is formed due to a difference of the processing temperatures between the two substrates
2
and
4
. The processing temperature of the upper substrate
4
is about 220° C., while that of the lower substrate
2
is about 300° C. The alignment margin is one cause that adversely affects an aperture ratio, as the alignment margins need to be covered by a black matrix for shielding light provided by a light source. As the size of the substrate increases, the aperture ratio also increases. As a result, the required increase in the alignment margins affects the aperture ratio.
When an LCD device is manufactured using the COT technique, there is a disadvantage that the process of forming the passivation film
60
is additionally required. For the foregoing reasons, there is a need for an LCD device having a simplified manufacturing process, a high manufacturing yield, and a high aperture ratio.
SUMMARY OF THE INVENTION
To overcome the problems described above, preferred embodiments of the present invention provide a liquid crystal display device having a simplified manufacturing process, a high manufacturing yield, and a high aperture ratio.
A first preferred embodiment of the present invention provides a liquid crystal display device, including: a thin film transistor formed on a substrate, including a gate electrode, a source electrode, and a drain electrode; a color filter overlapping at least one of the source and drain electrodes; a planarization layer formed on the thin film transistor and the color filter; and a pixel electrode formed on the planarization layer and contacting the drain electrode.
The thin film transistor further includes: a gate insulating layer on the substrate and covering the gate electrode; and a semiconductor layer formed on the gate insulating layer, having an amorphous silicon layer and a doped amorphous silicon layer, wherein the gate electrode is formed on the substrate and the source and drian electrode are spaced apart form each other and overlap both end portions of the doped amorphous silicon layer, respectively.
In a second preferred embodiment, the thin film transistor may include an etch stopper on the doped amorphous silicon layer and between the source and drain electrodes.
In a third preferred embodiment, the thin film transistor further includes: an active layer having source and drain regions at both end portions thereof; a gate insulating layer on a central portion of the active layer other than the source and drain regions; a gate electrode formed on the gate insulating layer; and an inter layer insulator formed over the substrate, having first and second contact holes for respectively exposing a portion of the source and drain regions, wherein the source and drain electrodes are formed on the inter layer insulator to respectively contact with the source and drain regions. The active layer can be m
Chowdhury T.
LG. Philips LCD Co. Ltd.
Nguyen Hoan Chau
LandOfFree
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