Liquid crystal cells – elements and systems – Particular excitation of liquid crystal – Electrical excitation of liquid crystal
Reexamination Certificate
2000-08-18
2003-12-09
Dudek, James (Department: 2871)
Liquid crystal cells, elements and systems
Particular excitation of liquid crystal
Electrical excitation of liquid crystal
C349S039000
Reexamination Certificate
active
06661476
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a liquid crystal display device and its manufacturing method especially suitable for application to a TFT active matrix type liquid crystal display device.
2. Description of the Related Art
In liquid crystal devices of a conventional thin-film transistor (TFT) active matrix type, pixel signal switching thin-film transistors are provided for individual pixels. These pixels are arranged in the form of a matrix layout by wiring lines extending in horizontal and vertical directions. This type of conventional TFT active matrix liquid crystal display device is explained below in greater detail.
That is, as shown in
FIG. 1
, the TFT active matrix liquid crystal display device includes a horizontal scanning circuit
102
, phase adjusting circuit
103
, image signal supply switch
104
, vertical scanning circuit
105
for controlling scanning directions, and cross-talk preventing circuit
106
for preventing cross-talk, which are carried on a TFT active matrix liquid crystal display substrate
101
. Reference numeral
107
denotes external IC, and
108
denotes a connection terminal of the external IC.
In the image signal supply switch
104
and the vertical scanning circuit
105
, TFTs
109
for controlling individual pixels are arranged in a matrix. Each TFT is made up of a source/drain electrode and a gate electrode G. The gates are commonly connected to the vertical scanning circuit
105
. The source/drain electrodes SD are commonly connected to the image signal supply switch
104
and the cross-talk preventing circuit
106
.
A pixel in the TFT active matrix liquid crystal device having the above-mentioned structure is shown in FIG.
2
. As shown in
FIG. 2
, a thin-film semiconductor layer
112
of polycrystalline Si is formed in a predetermined pattern on a quartz glass substrate
111
to cover each shading region, and a gate dielectric film
113
is formed on the thin-film semiconductor layer
112
. On gate dielectric film
113
, a gate line is formed. Although not shown, in the thin-film semiconductor layer
112
, a source region and a drain region are formed in self alignment with the gate line
114
. The gate line
114
as a gate electrode and the source region and drain region make up each polycrystalline SiTFT for driving each pixel electrode. On a predetermined part of the gate dielectric film
113
above the drain region, a storage capacity line
115
is provided. This structure interposing the gate dielectric film
113
between the storage capacity line
115
and the drain region makes up a storage capacity element.
An inter-layer insulating film
116
is formed to cover the gate line
114
and the holding capacitor line
115
. In predetermined locations of the inter-layer insulating film
116
and the gate dielectric film
113
, contact holes
117
,
118
are made. On the inter-layer insulating film
116
, a lead-out electrode
119
is formed in connection with the drain region of the polycrystalline Si TFT through the contact hole
117
, and a signal line
120
is formed in connection with the source region of the polycrystalline Si TFT through the contact hole
118
. An inter-layer insulating film
121
is formed so as to cover the lead-out electrode
119
and signal line
120
. The inter-layer insulating film
121
has formed a contact hole
122
in a predetermined position above the lead-out electrode
119
. On the inter-layer insulating film
121
, an upper-layer shading film
123
is formed in connection with the lead-out electrode
119
through the contact hole
122
. The upper-layer shading film
123
, lead-out electrode
119
and signal line
120
stacked together shade all regions excluding the pixel opening regions from incident light from above. Another inter-layer insulating film
124
is formed to cover the upper-layer shading film
123
. The inter-layer insulating film
124
has formed a contact hole
125
in a predetermined position above the upper-layer shading film
123
. On the inter-layer insulating film
124
, a transparent pixel electrode
126
is provided in contact with the upper-layer shading film
123
through the contact hole
125
. The pixel electrode
126
is covered by an orientation film
127
stacked thereon.
On the orientation film
127
, a liquid crystal layer
128
is provided, which is covered by an orientation film
129
and an opposed common electrode
130
. On the opposed common electrode
130
, a transparent opposed electrode substrate
131
is provided.
In the liquid crystal display device having the above-explained configuration, a voltage applied to the transparent pixel electrode
126
connected to the thin-film semiconductor layer
112
forming TFT changes orientation of the liquid crystal molecules in the liquid crystal layer
128
to control the display.
Further provided in the display region are a signal line, gate line, storage capacity line, and thin-film transistor, among others. These lines and this transistor are located within an inter-pixel shading region provided in the TFT substrate or in the opposed substrate. An example of such an arrangement is shown in FIG.
3
.
FIG. 3
is an example of a plan-viewed layout of the configuration in which a signal line of the TFT substrate and an upper-layer shading film form a shading region in a complementary fashion.
As shown in
FIG. 3
, in the conventional liquid crystal device, the gate line
114
and the holding capacitor line
115
extend in parallel, and the signal lines
120
extend to intersect with the gate line
114
and holding capacitor line
115
. The lead-out electrodes
119
extend over the gate line
114
and the holding capacitor line
115
so as to bridge them in locations not overlapping the signal lines
120
. Each upper-layer shading film
123
has a geometry bridging two adjacent signal lines
120
and partly covering the holding capacitor line
115
, the gate line
114
and lead-out electrode
119
located between these two signal lines
120
. Each contact hole
118
is formed in a location of the signal line
120
overlapping an end portion of the thin-film semiconductor layer
112
. The thin-film semiconductor layer
112
underlies the holding capacitor line
115
and the signal line layer
120
. The holding capacitor line
115
has offset portions for avoiding the contact holes
117
. Through each contact hole
117
in the offset portion, the thin-film semiconductor layer
112
and the lead-out electrode
119
are connected together. In the region where the lead-out electrode
119
and the upper-layer shading film
123
overlap, the contact hole
122
is formed to connect them. Further, in the region where the upper-layer shading film
123
and the holding capacitor line
115
overlap, the contact hole
115
is formed to connect them.
Conventional liquid crystal devices having the above-explained configuration have recently come to be often used as light bulbs of liquid crystal projectors. Along with this tendency, higher optical transmittance and higher definition have been desired. In order to realize such high optical transmittance and high definition, it is necessary to reduce the inter-pixel shading regions of the liquid crystal display device.
In the conventional liquid crystal display device, however, transistors, signal lines
120
, gate lines
114
and holding capacitor lines
115
occupied their respective areas as shown in
FIG. 3
, and this was the bar against improvement of the pixel opening ratio.
OBJECTS AND SUMMARY OF THE INVENTION
It is therefore an object of the invention to provide a liquid crystal display device and its manufacturing method capable of reducing the pixel-to-pixel shading regions while maintaining a sufficient storage capacity area, and thereby attaining higher optical transmittance and higher definition.
According to the first aspect of the invention, there is provided a liquid crystal display device having a thin-film transistor for driving a pixel electrode and a storage capacity element on a substrate, comprising:
the storage capa
Abe Fumiaki
Sato Takusei
Dudek James
Kananen Ronald P.
Rader & Fishman & Grauer, PLLC
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